HM1-65642B-883 Datasheet, PDF (1/11 Pages) Intersil Corporation – 8K x 8 Asynchronous CMOS Static RAM

®
HM-65642/883
May 2002
8K x 8 Asynchronous
CMOS Static RAM
Features
• This Circuit is Processed in Accordance to MIL-STD-
883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
• Full CMOS Design
• Six Transistor Memory Cell
• Low Standby Supply Current . . . . . . . . . . . . . . . . 100µA
• Low Operating Supply Current. . . . . . . . . . . . . . . 20mA
• Fast Address Access Time . . . . . . . . . . . . . . . . . . 150ns
• Low Data Retention Supply Voltage . . . . . . . . . . . 2.0V
• CMOS/TTL Compatible Inputs/Outputs
• JEDEC Approved Pinout
• Equal Cycle and Access Times
• No Clocks or Strobes Required
• Gated Inputs
- No Pull-Up or Pull-Down Resistors Required
• Temperature Range -55^oC to +125^oC
• Easy Microprocessor Interfacing
• Dual Chip Enable Control
Description
The HM-65642/883 is a CMOS 8192 x 8-bit Static Random
Access Memory. The pinout is the JEDEC 28 pin, 8-bit wide
standard, which allows easy memory board layouts which
accommodate a variety of industry standard ROM, PROM,
EPROM, EEPROM and RAMs. The HM-65642/883 is ideally
suited for use in microprocessor based systems. In particu-
lar, interfacing with the Intersil 80C86 and 80C88 micropro-
cessors is simplified by the convenient output enable (G)
input.
The HM-65642/883 is a full CMOS RAM which utilizes an
array of six transistor (6T) memory cells for the most stable
and lowest possible standby supply current over the full mili-
tary temperature range.
Ordering Information
PACKAGE
CERDIP
CLCC
TEMPERATURE RANGE
150ns/75µA
-55^oC to +125^oC
HM1-65642B/883
-55^oC to +125^oC
HM4-65642B/883
150ns/150µA
HM1-65642/883
HM4-65642/883
Pinouts
HM-65642/883 (CERDIP)
TOP VIEW
HM4-65642/883 (CLCC)
TOP VIEW
200ns/250µA
HM1-65642C/883
-
PKG. NO.
F28.6
J32.A
NC ¹
A12 ²
A7 ³
A6 ⁴
A5 ⁵
A4 ⁶
A3 ⁷
A2 ⁸
A1 9
A0 10
DQ0 11
DQ1 12
DQ2 13
GND 14
28 VCC
27 W
26 E2
25 A8
24 A9
23 A11
22 G
21 A10
20 E1
19 DQ7
18 DQ6
17 DQ5
16 DQ4
15 DQ3
4 3 2 1 32 31 30
A6 5
29 _A8
A5 6
28 _A9
A4 7
27 A11
A3 8
26 _NC
A2 9
25 G
A1 10
24 A10
A0 11
23 E1
NC 12
22 _DQ7
DQ0 ¹³
21 DQ6
14 15 16 17 18 19 20
PIN
A
DQ
E1
E2
W
G
NC
GND
VCC
DESCRIPTION
Address Input
Data Input/Output
Chip Enable
Chip Enable
Write Enable
Output Enable
No Connections
Ground
Power
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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