HM-65162883 Datasheet, PDF (1/9 Pages) Intersil Corporation – 2K x 8 Asynchronous CMOS Static RAM

TM
HM-65162/883
March 1997
2K x 8 Asynchronous
CMOS Static RAM
Features
• This Circuit is Processed in Accordance to MIL-STD-
883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
• Fast Access Time . . . . . . . . . . . . . . . . . . . 70/90ns Max
• Low Standby Current. . . . . . . . . . . . . . . . . . . . 50µA Max
• Low Operating Current . . . . . . . . . . . . . . . . . 70mA Max
• Data Retention at 2.0V . . . . . . . . . . . . . . . . . . . 20µA Max
• TTL Compatible Inputs and Outputs
• JEDEC Approved Pinout (2716, 6116 Type)
• No Clocks or Strobes Required
• Wide Temperature Range . . . . . . . . . . -55^oC to +125^oC
• Equal Cycle and Access Time
• Single 5V Supply
• Gated Inputs
- No Pull-Up or Pull-Down Resistors Required
Description
The HM-65162/883 is a CMOS 2048 x 8 Static Random
Access Memory manufactured using the Intersil Advanced
SAJI V process. The device utilizes asynchronous circuit
design for fast cycle time and ease of use. The pinout is the
JEDEC 24 pin DIP, and 32 pad 8-bit wide standard which
allows easy memory board layouts flexible to accommodate
a variety of industry standard PROMs, RAMs, ROMs and
EPROMs. The HM-65162/883 is ideally suited for use in
microprocessor based systems with its 8-bit word length
organization. The convenient output enable also simplifies
the bus interface by allowing the data outputs to be con-
trolled independent of the chip enable. Gated inputs lower
operating current and also eliminate the need for pull-up or
pull-down resistors.
Ordering Information
70ns/20µA
HM1-65162B/883
HM4-65162B/883
90ns/40µA
HM1-65162/883
HM4-65162/883
90ns/300µA
HM1-65162C/883
-
TEMP. RANGE
-55^oC to 125^oC
-55^oC to 125^oC
PACKAGE
CERDIP
CLCC
PKG. NO.
F24.6
J32.A
Pinouts
HM-65162/883 (CERDIP)
TOP VIEW
HM-65162/883 (CLCC)
TOP VIEW
A7 1
A6 2
A5 3
A4 4
A3 5
A2 6
A1 7
A0 8
DQ0 9
DQ1 10
DQ2 11
GND 12
24 VCC
23 A8
22 A9
21 W
20 G
19 A10
18 E
17 DQ7
16 DQ6
15 DQ5
14 DQ4
13 DQ3
4 3 2 1 32 31 30
A6 5
29 _A8
A5 6
28 _A9
A4 7
27 NC
A3 8
26 _W
A2 9
25 G
A1 10
24 A10
A0 11
23 E
NC 12
22 DQ7
DQ0 ¹³
21 DQ6
14 15 16 17 18 19 20
PIN
DESCRIPTION
NC
No Connect
A0 - A10 Address Input
E
Chip Enable/Power Down
VSS/GND Ground
DQ0 - DQ7 Data In/Data Out
VCC
Power (+5V)
W
Write Enable
G
Output Enable
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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