HIP6019 Datasheet, PDF (1/15 Pages) Intersil Corporation – Advanced Dual PWM and Dual Linear Power Control

Data Sheet
HIP6019
April 1998 File Number 4490.2
Advanced Dual PWM and Dual Linear
Power Control
The HIP6019 provides the power control and protection for four
output voltages in high-performance microprocessor and
computer applications. The IC integrates two PWM controllers,
a linear regulator and a linear controller as well as the
monitoring and protection functions into a single 28 lead SOIC
package. One PWM controller regulates the microprocessor
core voltage with a synchronous-rectified buck converter, while
the second PWM controller supplies the computer’s 3.3V power
with a standard buck converter. The linear controller regulates
power for the GTL bus and the linear regulator provides power
for the clock driver circuits.
The HIP6019 includes an Intel-compatible, TTL 5-input digital-
to-analog converter (DAC) that adjusts the core PWM output
voltage from 2.1V_DC to 3.5V_DC in 0.1V increments and from
1.8V_DC to 2.05V_DC in 0.05V steps. The precision reference
and voltage-mode control provide ±1% static regulation. The
second PWM controller is user-adjustable for output levels
between 3.0V and 3.5V with ±2% accuracy. The adjustable
linear regulator uses an internal pass device to provide 2.5V
±2.5%. The adjustable linear controller drives an external N-
Channel MOSFET to provide 1.5V ±2.5%.
The HIP6019 monitors all the output voltages. A single Power
Good signal is issued when the core is within ±10% of the DAC
setting and the other levels are above their under- voltage
levels. Additional built-in over-voltage protection for the core
output uses the lower MOSFET to prevent output voltages
above 115% of the DAC setting. The PWM controller’s over-
current functions monitor the output current by sensing the
voltage drop across the upper MOSFET’s r_DS(ON), eliminating
the need for a current sensing resistor.
Pinout
HIP6019 (SOIC)
TOP VIEW
UGATE2 1
PHASE2 2
VID4 3
VID3 4
VID2 5
VID1 6
VID0 7
PGOOD 8
OCSET2 9
FB2 10
COMP2 11
SS 12
FAULT/RT 13
FB4 14
28 V_CC
27 UGATE1
26 PHASE1
25 LGATE1
24 PGND
23 OCSET1
22 VSEN1
21 FB1
20 COMP1
19 FB3
18 GATE3
17 GND
16 VOUT4
15 VSEN2
Features
• Provides 4 Regulated Voltages
- Microprocessor Core, I/O, Clock Chip and GTL Bus
• Drives N-Channel MOSFETs
• Operates from +5V and +12V Inputs
• Simple Single-Loop Control Designs
- Voltage-Mode PWM Control
• Fast Transient Response
- High-Bandwidth Error Amplifiers
- Full 0% to 100% Duty Ratios
• Excellent Output Voltage Regulation
- Core PWM Output: ±1% Over Temperature
- I/O PWM Output: ±2% Over Temperature
- Other Outputs: ±2.5% Over Temperature
• TTL-Compatible 5-Bit Digital-to-Analog Core Output
Voltage Selection
- Wide Range . . . . . . . . . . . . . . . . . . . 1.8V_DC to 3.5V_DC
- 0.1V Steps . . . . . . . . . . . . . . . . . . . . 2.1V_DC to 3.5V_DC
- 0.05V Steps . . . . . . . . . . . . . . . . . . 1.8V_DC to 2.05V_DC
• Power-Good Output Voltage Monitor
• Microprocessor Core Voltage Protection Against Shorted
MOSFET
• Over-Voltage and Over-Current Fault Monitors
- Does Not Require Extra Current Sensing Element,
Uses MOSFET’s r_DS(ON)
• Small Converter Size
- Constant Frequency Operation
- 200kHz Free-Running Oscillator; Programmable from
50kHz to 1MHz
Applications
• _{Full Motherboard Power Regulation for Computers}
• Low-Voltage Distributed Power Supplies
Ordering Information
PART NUMBER TEMP. (^oC) PACKAGE
HIP6019CB
0 to 70 28 Ld SOIC
HIP6019EVAL1 Evaluation Board
PKG. NO.
M28.3
2-252
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999