HI5735 Datasheet, PDF (1/12 Pages) Intersil Corporation – 12-Bit, 80 MSPS, High Speed Video D/A Converter

HI5735
January 1998
12-Bit, 80 MSPS,
High Speed Video D/A Converter
Features
Description
• Throughput Rate . . . . . . . . . . . . . . . . . . . . . . . 80 MSPS
• Low Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .650mW
• Integral Linearity Error . . . . . . . . . . . . . . . . . . 0.75 LSB
• Low Glitch Energy . . . . . . . . . . . . . . . . . . . . . . . . 3.0pV-s
• TTL/CMOS Compatible Inputs
• Improved Hold Time . . . . . . . . . . . . . . . . . . . . . . 0.25ns
• Excellent Spurious Free Dynamic Range
Applications
• Professional Video
The HI5735 is a 12-bit, 80 MSPS, D/A converter which is
implemented in the Intersil BiCMOS 10V (HBC-10) process.
Operating from +5V and -5.2V, the converter provides
-20.48mA of full scale output current and includes an input
data register and bandgap voltage reference. Low glitch
energy and excellent frequency domain performance are
achieved using a segmented architecture. The digital inputs
are TTL/CMOS compatible and translated internally to ECL.
All internal logic is implemented in ECL to achieve high
switching speed with low noise. The addition of laser trim-
ming assures 12-bit linearity is maintained along the entire
transfer curve.
Ordering Information
• Cable TV Headend Equipment
TEMP.
PART NUMBER RANGE (^oC)
PACKAGE
PKG.
NO.
HI5735KCP
0 to 70 28 Lead PDIP
E28.6
HI5735KCB
0 to 70 28 Lead SOIC
M28.3
Pinout
HI5735
(PDIP, SOIC)
TOP VIEW
D11 (MSB) 1
D10 2
D9 3
D8 4
D7 5
D6 6
D5 7
D4 8
D3 9
D2 10
D1 11
D0 (LSB) 12
NC 13
NC 14
28 DGND
27 AGND
26 REF OUT
25 CTRL OUT
24 CTRL IN
23 R_SET
22 AV_EE
21 I_OUT
20 I_OUT
19 ARTN
18 DV_EE
17 DGND
16 DV_CC
15 CLOCK
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
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File Number 4133.3