HI-301 Datasheet, PDF (1/11 Pages) Intersil Corporation – CMOS Analog Switches

TM
Data Sheet
HI-301 thru HI-307
March 2000 File Number 3125.4
CMOS Analog Switches
The HI-301 thru HI-307 series of switches are monolithic
devices fabricated using CMOS technology and the Intersil
dielectric isolation process. These switches feature break
before-make switching, low and nearly constant ON
resistance over the full analog signal range, and low power
dissipation, (a few mW for the Hl-301 and HI-303, a few
hundred mW for the HI-307).
The HI-301 and HI-303 are TTL compatible and have a logic
“0” condition with an input less than 0.8V and a logic “1”
condition with an input greater than 4V. The HI-307 switches
are CMOS compatible and have a low state with an input
less than 3.5V and a high state with an input greater than
11V. (See pinouts for switch conditions with a logic “1” input.)
Ordering Information
PART
NUMBER
TEMP.
RANGE (^oC)
PACKAGE
HI9P0301-5
HI1-0303-2
HI1-0303-5
HI9P0303-5
HI9P0303-9
HI1-0307-5
0 to 75
-55 to 125
0 to 75
0 to 75
-40 to 85
0 to 75
14 Ld SOIC
14 Ld CERDIP
14 Ld CERDIP
14 Ld SOIC
14 Ld SOIC
14 Ld CERDIP
PKG. NO.
M14.15
F14.3
F14.3
M14.15
M14.15
F14.3
Features
• Analog Signal Range (±15V Supplies) . . . . . . . . . . ±15V
• Low Leakage at 25^oC . . . . . . . . . . . . . . . . . . . . . . . 40pA
• Low Leakage at 125^oC . . . . . . . . . . . . . . . . . . . . . . . 1nA
• Low On Resistance at 25^oC . . . . . . . . . . . . . . . . . . . 35Ω
• Break-Before-Make Delay . . . . . . . . . . . . . . . . . . . . 60ns
• Charge Injection . . . . . . . . . . . . . . . . . . . . . . . . . . . 30pC
• TTL, CMOS Compatible
• Symmetrical Switch Elements
• Low Operating Power (Typ for Hl-301 and HI-303) . . 1.0mW
Applications
• Sample and Hold (i.e., Low Leakage Switching)
• Op Amp Gain Switching (i.e., Low On Resistance)
• Portable, Battery Operated Circuits
• Low Level Switching Circuits
• Dual or Single Supply Systems
Functional Diagram
IN
N
S
P
D
Pinouts Switch States Shown For A Logic “1” Input
SPST HI-301
(SOIC)
TOP VIEW
NC 1
D₁ 2
NC 3
S₁ 4
NC 5
IN 6
GND 7
14 V+
13 D₂
12 NC
11 S₂
10 NC
9 NC
8 V-
DUAL SPDT HI-303 (CERDIP, SOIC)
HI-307 (CERDIP)
TOP VIEW
NC 1
S₃ 2
D₃ 3
D₁ 4
S₁ 5
IN₁ 6
GND 7
14 V+
13 S₄
12 D₄
11 D₂
10 S₂
9 IN₂
8 V-
LOGIC
0
1
SW1
OFF
ON
SW2
ON
OFF
LOGIC
0
1
SW1, SW2 SW3, SW4
OFF
ON
ON
OFF
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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