HCTS7266MS Datasheet, PDF (1/8 Pages) Intersil Corporation – Radiation Hardened Quad 2-Input Exclusive NOR Gate

HCTS7266MS
August 1995
Radiation Hardened
Quad 2-Input Exclusive NOR Gate
Features
Pinouts
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm²/mg
• Single Event Upset (SEU) Immunity < 2 x 10^-9 Errors/Bit-Day
(Typ)
• Dose Rate Survivability: >1 x 10¹² RAD (Si)/s
• Dose Rate Upset >10¹⁰ RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55^oC to +125^oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = 2.0V Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL
PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T14
TOP VIEW
A1 1
B1 2
Y1 3
Y2 4
A2 5
B2 6
GND 7
14 VCC
13 B4
12 A4
11 Y4
10 Y3
9 B3
8 A3
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(FLATPACK) MIL-STD-1835 CDFP3-F14
TOP VIEW
Description
A1
B1
The Intersil HCTS7266MS is a Radiation Hardened quad 2-Input
exclusive NOR Gate. A logic level high on either one of the inputs ^Y1
(A or B) will force the output (y) low. A high on both inputs, or a low ^Y2
on both inputs will force the output to a logic high.
A2
1
14
2
13
3
12
4
11
5
10
VCC
B4
A4
Y4
Y3
The HCTS7266MS utilizes advanced CMOS/SOS technology to ^B2
achieve high-speed operation. This device is a member of radia- GND
tion hardened, high-speed, CMOS/SOS Logic Family with TTL
input compatibility.
6
9
B3
7
8
A3
The HCTS7266MS is supplied in a 14 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
Functional Diagram
An
PART
NUMBER
HCTS7266DMSR
HCTS7266KMSR
HCTS7266D/
Sample
HCTS7266K/
Sample
HCTS7266HMSR
TEMPERATURE SCREENING
RANGE
LEVEL
PACKAGE
-55^oC to +125^oC Intersil Class 14 Lead
S Equivalent SBDIP
-55^oC to +125^oC Intersil Class
S Equivalent
14 Lead
Ceramic
Flatpack
+25^oC
Sample
14 Lead
SBDIP
+25^oC
Sample
14 Lead
Ceramic
Flatpack
+25^oC
Die
Die
Yn
Bn
TRUTH TABLE
INPUTS
OUTPUTS
A
B
Y
L
L
H
L
H
L
H
L
L
H
H
H
NOTE: L = Logic Level Low, H = Logic level High
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1
Spec Number 518627
File Number 3384.1