HCS374MS Datasheet, PDF (1/10 Pages) Intersil Corporation – Radiation Hardened Octal D-Type Flip-Flop, Three-State, Positive Edge Triggered

HCS374MS
September 1995
Radiation Hardened Octal D-Type
Flip-Flop, Three-State, Positive Edge Triggered
Features
Pinouts
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm²/mg
• Single Event Upset (SEU) Immunity < 2 x 10^-9 Errors/Bit-
Day (Typ)
• Dose Rate Survivability: >1 x 10¹² RAD (Si)/s
• Dose Rate Upset >10¹⁰ RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range)
- Bus Driver Outputs - 15 LSTTL Loads
• Military Temperature Range: -55^oC to +125^oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 0.3 VCC Max
- VIH = 0.7 VCC Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20
TOP VIEW
OE 1
Q0 2
D0 3
D1 4
Q1 5
Q2 6
D2 7
D3 8
Q3 9
GND 10
20 VCC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 CP
Description
The Intersil HCS374MS is a Radiation Hardened non-inverting
octal D-type, positive edge triggered flip-flop with three-stateable
outputs. The HCS374MS utilizes advanced CMOS/SOS technol-
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20
TOP VIEW
ogy. The eight flip-flops enter data into their registers on the OE
LOW-to-HIGH transition of the clock (CP). Data is also Q0
transferred to the outputs during this transition. The output _D0
enable (OE) controls the three-state outputs and is independent _D1
of the register operation. When the output enable is high, the out- _Q1
puts are in the high impedance state.
Q2
1
20
2
19
3
18
4
17
5
16
6
15
VCC
Q7
D7
D6
Q6
Q5
The HCS374MS utilizes advanced CMOS/SOS technology to ^D2
achieve high-speed operation. This device is a member of ^D3
radiation hardened, high-speed, CMOS/SOS Logic Family.
Q3
7
14
D5
8
13
D4
9
12
Q4
GND
The HCS374MS is supplied in a 20 lead Ceramic flatpack
10
11
CP
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
PART NUMBER
HCS374DMSR
HCS374KMSR
HCS374D/Sample
HCS374K/Sample
HCS374HMSR
TEMPERATURE RANGE
-55^oC to +125^oC
-55^oC to +125^oC
+25^oC
+25^oC
+25^oC
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
358
PACKAGE
20 Lead SBDIP
20 Lead Ceramic Flatpack
20 Lead SBDIP
20 Lead Ceramic Flatpack
Die
Spec Number 518770
File Number 2470.2