CA3252 Datasheet, PDF (1/6 Pages) Intersil Corporation – Quad Gated Non-Inverting Power Driver

CA3252
March 1998
Quad Gated Non-Inverting Power Driver
Features
Description
• Four 600mA Non-Inverting Power Output Drivers
• 50V and 1A Maximum Rated Power Output Drivers
• V_CE(SUS) Capability . . . . . . . . . . . . . . . . . . . . . . . . . 35V
• Inputs Compatible With TTL or 5V CMOS Logic
• Suitable For Resistive, Lamp or Inductive Loads
• Inductive Clamps on Each Output
• High Dissipation Power-Frame Package
• Operating Temperature Ranges . . . . . . -40^oC to 105^oC
The CA3252 is used to interface low-level logic to high cur-
rent loads. Each Power Driver has four inverting switches
consisting of an inverting logic input stage and an inverting
low-side driver output stage. All inputs are 5V TTL/CMOS
logic compatible and have a common Enable input. On-chip
steering diodes are connected from each output (in pairs) to
the CLAMP pins (in pairs) which may be used in conjunction
with external zener diodes to protect the IC against over-volt-
age transients that result from inductive load switching. The
CA3252 may be used in a variety of automotive and indus-
trial control applications to drive relays, solenoids, lamps and
small motors.
Applications
• Solenoids
• Relays
• Lamps
• Steppers
• Small Motors
• Displays
System Applications
• Automotive
To allow for maximum heat transfer from the chip, all ground
pins on the DIP and SOIC packages are directly connected
to the mounting pad of the chip. Integral heat spreading lead
frames directly connect the bond pad and ground leads for
good heat dissipation. In a typical application, the package is
mounted on a copper PC Board. By increasing copper
ground area on the PC Board, more heat is conducted away
from the ground leads. The junction-to-ambient thermal
resistances may be reduced to less than 40^oC/W with
approximately two square inches of copper area.
Ordering Information
PART
NUMBER
TEMP. (^oC)
PACKAGE
PKG. NO.
• Appliances
CA3252E
-40 to 105 16 Ld PDIP
E16.3
• Industrial Controls
• Robotics
CA3252M
-40 to 105 20 Ld SOIC
M20.3
Pinouts
CA3252E
(PDIP)
TOP VIEW
CA3252M
(SOIC)
TOP VIEW
OUT A 1
CLAMP AB 2
OUT B 3
GND 4
GND 5
OUT C 6
CLAMP CD 7
OUT D 8
16 IN A
15 IN B
14 ENABLE
13 GND
12 GND
11 V_CC
10 IN C
9 IN D
CLAMP AB 1
NC 2
NC 3
OUT B 4
GND 5
GND 6
OUT C 7
NC 8
NC 9
CLAMP CD 10
20 OUT A
19 IN A
18 INB
17 ENABLE
16 GND
15 GND
14 V_CC
13 IN C
12 IN D
11 OUT D
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
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File Number 1542.2