82C82_02 Datasheet, PDF (1/7 Pages) Intersil Corporation – CMOS Octal Latching Bus Driver

TM
82C82
March 1997
CMOS Octal Latching Bus Driver
Features
Description
• Full Eight-Bit Parallel Latching Buffer
• Bipolar 8282 Compatible
• Three-State Noninverting Outputs
• Propagation Delay . . . . . . . . . . . . . . . . . . . . . 35ns Max.
• Gated Inputs:
- Reduce Operating Power
- Eliminate the Need for Pull-Up Resistors
• Single 5V Power Supply
• Low Power Operation . . . . . . . . . . . . . . . ICCSB = 10µA
• Operating Temperature Ranges
- C82C82 . . . . . . . . . . . . . . . . . . . . . . . . . . 0^oC to +70^oC
- I82C82 . . . . . . . . . . . . . . . . . . . . . . . . . -40^oC to +85^oC
- M82C82 . . . . . . . . . . . . . . . . . . . . . . . -55^oC to +125^oC
The Intersil 82C82 is a high performance CMOS Octal
Latching Buffer manufactured using a self-aligned silicon
gate CMOS process (Scaled SAJI IV). The 82C82 provides
an eight-bit parallel latch/buffer in a 20 pin package. The
active high strobe (STB) input allows transparent transfer of
data and latches data on the negative transition of this sig-
nal. The active low output enable (OE) permits simple inter-
face to state-of-the-art microprocessor systems.
Ordering Information
PART NUMBER
CP82C82
IP82C82
CS82C82
IS82C82
CD82C82
ID82C82
MD82C82/B
8406701RA
MR82C82/B
84067012A
TEMP. RANGE
0^oC to +70^oC
-40^oC to +85^oC
0^oC to +70^oC
-40^oC to +85^oC
0^oC to +70^oC
-40^oC to +85^oC
-55^oC to +125^oC
PACKAGE
20 Ld PDIP
20 Ld PLCC
20 Ld CERDIP
PKG. NO.
E20.3
N20.35
F20.3
SMD #
-55^oC to +125^oC 20 Pad CLCC J20.A
SMD #
Pinouts
82C82 (PDIP, CERDIP)
TOP VIEW
82C82 (PLCC, CLCC)
TOP VIEW
DI₀ 1
DI₁ 2
DI₂ 3
DI₃ 4
DI₄ 5
DI₅ 6
DI₆ 7
DI₇ 8
OE 9
GND 10
20 V_CC
19 DO₀
18 DO₁
17 DO₂
16 DO₃
15 DO₄
14 DO₅
13 DO₆
12 DO₇
11 STB
3 2 1 20 19
DI₃ 4
DI₄ 5
DI₅ 6
DI₆ 7
DI₇ 8
18 DO₁
17 DO₂
16 DO₃
15 DO₄
14 DO₅
9 10 11 12 13
TRUTH TABLE
STB OE DI
DO
X
H
X
Hi-Z
H
L
L
L
H
L
H
H
↓
L
X
†
H = Logic One
L = Logic Zero
X = Don’t Care
† = Latched to Value of Last
Data
Hi-Z = High Impedance
↓ = Neg. Transition
PIN NAMES
PIN
DI₀-DI₇
DO₀-DO₇
STB
OE
DESCRIPTION
Data Input Pins
Data Output Pins
Active High Strobe
Active Low Output
Enable
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Copyright © Intersil Americas Inc. 2002. All Rights Reserved
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