1-6H005 Datasheet, PDF (2/4 Pages) InterFET Corporation – The 1-6HOOS general purpose

1-6H005 12-Bit AID Converter
InterFITEATC HYBRID TECHNOLOGY
Table II - 100% Device Screening
I TEST SCREEN
I I METHOD· CONDITIONS
8-94
1. Precap Internal Visual
2. High Temperature Storage
2017
1008
Conditions C, TA =150°C. Time = 24 hours minimum
3. Temperature Cycling
4. Constant Acceleration
5. Fine Leak
6. Gross Leak
7. Interim Electrical Test
8. Burn-In
9. Final Electrical Test
10. External Visual
1010
2001
1014
1014
-
1015
-
2009
Condition C, -65°C to + 150°C, 10Cycles
Condition A, 5KGs, Y, and Y₂ axis only.
Condition A
Condition C
Optional
Condition B, Time =160 hours minimum.
TA =+5°C, VCC =5.5V, IF =20mA, ID =25mA.
Group A, Subgroup 1, 10% PDA applies.
Group A, Subgroup 2, 3, 9.
• Refers to screening as defined in MIL-H-38534.lnterFET is not certified and does not imply certification byreferencing these methods.
Timing Diagram
1 - - - - - - - - - Maximum Throughput Time² - - - - - - - - - - - - 1
Status (EOC)
(MSB) Bit 1 (0)
,'----
Conversion Time
~
_
Bit 2 (1)
Bit 3 (1)
Bit 4 (0)
Bit 5 (0)
Bit 6 (1)
L...-..
----------,
----lr-­
r-­
Bit 7 (1)
Bit 8 (1)
Bit 9 (0)
Bit 10 (1)
L.­
--'r-
Bit 11 (1)
(LSB) Bit 12) (0)
Serial Data Out³
Bit Number
== e 1 1 0 0
L----.J
1
110 11
0
L----.J
L----.J - -
1 2 3 4 5 6 7 8 9 10 11 12
(MSB)
(LSB)
Notes: 1. The internal clock runs continuously. The Convert Command must go low atleast 80 nSec before the
rising edge of any clock pulse to initiate a conversion, and must return high atlease 80 nSec before
the next low to high clock transition.
2. The maximum throughput time is54 ~Sec for 12bits.
A
InterFET
3. Ifserial data isstrobed, use the trailing edge of the clock. During data conversion, the determination
as to the proper state of any bit (bit lin") ismade on the rising edge of the clock pulse and the parallel
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output data isconsidered valid atthe negative edge ofthe clock cycle (actually valid following the clock
low to high transition). The serial output then is clocked atthe next clock cycle, thus it will recolre 13
clock steps to obtain the correct serial 12bit data. Thus valid serial data isprovided at clock "nil + 1.