J270 Datasheet, PDF (1/1 Pages) Calogic, LLC – P-Channel JFET

8/2014
J270, J271
P-Channel Silicon Junction Field-Effect Transistor
∙ Analog Switch
∙ Sample and Hold
∙ Low Noise, High Gain Amplifier
Absolute maximum ratings at T_A = 25^oC
Reverse Gate Source & Gate Drain Voltage -30V
Continuous Forward Gate Current
50 mA
Continuous Device Power Dissipation 360 mW
Power Derating
2.8 mW/^oC
At 25^oC free air temperature
Static Electrical Characteristics
Gate Source Breakdown
Voltage
V_(BR)GSS
Gate Reverse Current
I_GSS
Gate Source Cutoff Voltage
V_GS(OFF)
Drain Saturation Current
I_DSS
(pulsed)
Dynamic Electrical Characteristics
Common-Source Forward
Transconductance
g_fs
Common-Source Input
Capacitance
C_iss
Common-Source Reverse
Transfer Capacitance
C_rss
Typical
Equivalent Short Circuit Input
Noise Voltage
~e_N
J270
Min Max
-30
200
0.5 2
-2 -15
6 15
32
4
6
J271
Min Max
-30
200
1.5 4.5
-6 -50
8
18
32
4
6
Unit
V
pA
V
mA
Process PJ99
Test Conditions
I_G = 1 uA, V_DS = 0 V
V_GS = 10 V, V_DS = 0 V
V_DS = -10 V, V_GS = 0 V
V_DS = -10 V, V_GS = 0 V
mS
V_DS = -10 V, V_GS = 0 V
f=1
kHz
pF
V_DS = -10 V, V_GS = 0 V
f=1
MHz
pF
V_DS = -10 V, V_GS = 0 V
f=1
MHz
nV/√Hz V_DS = 10 V, I_D = 5 mA
f=1
kHz
SMP2608, SMP2609
715 N. Glenville Dr., Ste. 400
Richardson, TX 75089
[phone] Fax [phone]
SMPJ270, SMPJ271
www.interfet.com