IFN421 Datasheet, PDF (1/1 Pages) InterFET Corporation – Dual N-Channel Silicon Junction Field-Effect Transistor

01/99
B-41
IFN421, IFN422, IFN423
Dual N-Channel Silicon Junction Field-Effect Transistor
Â¥ Very High Input Impedance
Differential Amplifiers
Â¥ Electrometers
Absolute maximum ratings at T_A = 25¡C
Device Dissipation (Derate 3.2 mW/°C to 50°C)
Total Device Dissipation (Derate 6 mW/°C to 150°C)
Storage Temperature Range
400 mW
750 mW
– 65°C to 200°C
At 25°C free air temperature:
Static Electrical Characteristics
IFN421, IFN422, IFN423
Min Typ Max Unit
Process NJ01
Test Conditions
Gate Source Breakdown Voltage
Gate to Gate Breakdown Voltage
Gate Reverse Current
Gate Operating Current
Gate Source Cutoff Voltage
Gate Source Voltage
Drain Saturation Current (Pulsed)
Dynamic Electrical Characteristics
V_(BR)GSS – 40 – 60
V I_G = – 1 µA, V_DS = ØV
BV_G1G2
±40
V I_G = – 1 µA, I_D = ØA, I_S = ØA
I_GSS
–1
pA V_GS = – 20V, V_DS = ØV
–1
nA V_GS = – 20V, V_DS = ØV
I_G
– 0.25 pA V_DS = 10V, I_D = 30 µA
– 250 pA V_DS = 10V, I_D = 30 µA
V_GS(OFF) – 0.4
–2
V V_DS = 10V, I_D = 1 nA
V_GS
– 1.8 V V_DS = 10V, I_D = 30 µA
I_DSS
60
1000 µA V_DS = 10V, V_GS = Ø V
T_A = +125°C
T_A = +125°C
Common Source Forward Transconductance g_fs
Common Source Output Conductance g_os
Common Source Input Capacitance
C_iss
Common Source Reverse Transfer Capacitance C_rss
Equivalent Circuit Input Noise Voltage
e¯_N
Noise Figure
NF
100
1500 µS V_DS = 10V, V_GS = Ø V
3
µS V_DS = 10V, I_D = 30 µA
3
pF V_DS = 10V, V_GS = Ø V
1.5
pF V_DS = 10V, V_GS = Ø V
20
70 nV/√Hz V_DS = 10V, I_D = 30 µA
1
dB
V_DS = 10V, I_D = 30 µA
R_G = 10 MΩ
f = 1 kHz
f = 1 kHz
f = 1 MHz
f = 1 MHz
f = 10 Hz
f = 10 Hz
Max - IFN421 IFN422 IFN423
Differential Gate Source Voltage
Differential Gate Source Voltage
With Temperature
|V_GS1– V_GS2| 10
15
25
mV V_DG = 10V, I_D = 30 µA
|V_GS1– V_GS2| ₁₀
∆T
25
40 µV/°C V_DG = 10V, I_D = 30 µA
T_A = – 55°C
T_B = 25°C
T_C = 125°C
Min - IFN421 IFN422 IFN423
Common Mode Rejection Ratio
CMRR
90
80
80
dB V_DG = 10V to 20V, I_D = 30 µA
TOÐ78 Package
See Section G for Outline Dimensions
Pin Configuration
1 Source 1, 2 Drain 1, 3 Gate 1, 4 Case,
5 Source 2, 6 Drain 2, 7 Gate 2,
8 Omitted
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