LXT972A Datasheet, PDF (59/70 Pages) Intel Corporation – 3.3V Dual-Speed Fast Ethernet Transceiver Datasheet

3.3V Dual-Speed Fast Ethernet Transceiver Datasheet — LXT972A
Table 38. MII Status Register #1 (Address 1)
Bit
Name
1.12
10Mbps Full-Duplex
1.11
10Mbps Half-Duplex
100BASE-T2 Full-
1.10
Duplex
Not Supported
100BASE-T2 Half-
1.9
Duplex
Not Supported
1.8
Extended Status
1.7
Reserved
1.6
MF Preamble
Suppression
1.5
Auto-Negotiation
Complete
1.4
Remote Fault
1.3
Auto-Negotiation
Ability
1.2
Link Status
1.1
Jabber Detect
1.0
Extended Capability
1. RO = Read Only
LL = Latching Low
LH = Latching High
Description
1 = PHY able to operate at 10Mbps in full-duplex mode
0 = PHY not able to operate at 10Mbps full-duplex mode
1 = PHY able to operate at 10Mbps in half-duplex mode
0 = PHY not able to operate at 10Mbps in half-duplex
1 = PHY able to perform full-duplex 100BASE-T2
0 = PHY not able to perform full-duplex 100BASE-T2
1 = PHY able to perform half duplex 100BASE-T2
0 = PHY not able to perform half-duplex 100BASE-T2
1 = Extended status information in register 15
0 = No extended status information in register 15
1 = ignore when read
1 = PHY accepts management frames with preamble suppressed
0 = PHY will not accept management frames with preamble
suppressed
1 = Auto-negotiation complete
0 = Auto-negotiation not complete
1 = Remote fault condition detected
0 = No remote fault condition detected
1 = PHY is able to perform Auto-Negotiation
0 = PHY is not able to perform Auto-Negotiation
1 = Link is up
0 = Link is down
1 = Jabber condition detected
0 = Jabber condition not detected
1 = Extended register capabilities
0 = Basic register capabilities
Type ¹
RO
RO
RO
RO
RO
RO
RO
RO
RO/LH
RO
RO/LL
RO/LH
RO
Default
1
1
0
0
0
0
0
0
0
1
0
0
1
Table 39. PHY Identification Register 1 (Address 2)
Bit
Name
2.15:0
PHY ID
Number
1. RO = Read Only
Description
The PHY identifier composed of bits 3 through 18 of the OUI.
Type ¹
RO
Default
0013 hex
Datasheet
59