LXT362 Datasheet, PDF (4/48 Pages) Intel Corporation – Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications

LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications
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LXT362 Block Diagram ......................................................................................... 7
LXT362 Pin Assignments...................................................................................... 8
50% Duty Cycle Coding ...................................................................................... 15
Serial Port Data Structure ................................................................................... 19
TAOS with LLOOP .............................................................................................. 21
Local Loopback ................................................................................................... 22
Analog Loopback ................................................................................................ 22
Remote Loopback ............................................................................................... 23
Dual Loopback .................................................................................................... 24
TAOS Data Path ................................................................................................. 24
QRSS Mode ........................................................................................................ 25
Typical Hardware Mode Application.................................................................... 36
Typical Host Mode Application............................................................................ 37
1.544 MHz T1 Pulse (DS1 and DSX-1) (See Table 25) ...................................... 40
Transmit Clock Timing ........................................................................................ 41
Receive Clock Timing ......................................................................................... 42
Serial Data Input Timing Diagram ....................................................................... 43
Serial Data Output Timing Diagram .................................................................... 43
Typical T1 Jitter Tolerance at 36 dB ................................................................... 44
T1 Jitter Attenuation ............................................................................................ 45
Plastic Leaded Chip Carrier Package Specifications .......................................... 46
Plastic Quad Flat Package Specifications........................................................... 47
Low-Profile Quad Flat Package Specifications ................................................... 48
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Datasheet