28F400BV-TB Datasheet, PDF (38/57 Pages) Intel Corporation – 4-MBIT (256K X 16, 512K X 8)SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY

4-MBIT SmartVoltage BOOT BLOCK FAMILY
E
Table 14. AC Characteristics: WE#–Controlled Write Operations ⁽¹⁾ (Commercial) (Continued)
Prod
BV-80
BV-120
Sym
Parameter
VCC 3.3 ±0.3V ⁽⁹⁾ 5V±10%⁽¹¹⁾ 3.3 ± 0.3V⁽⁹⁾ 5V±10%⁽¹¹⁾ Unit
Load 50 pF
100 pF
50 pF
100 pF
Notes Min Max Min Max Min Max Min Max
t_AVAV
t_PHWL
Write Cycle Time
RP# Setup to WE# Going
Low
150
80
180
120
ns
0.8
0.45
0.8
0.45
µs
t_ELWL CE# Setup to WE# Going
0
0
0
0
ns
Low
t_PHHWH Boot Block Lock Setup to 6,8 200
100
200
100
ns
WE# Going High
t_VPWH
VPP Setup to WE# Going
High
5,8 200
100
200
100
ns
t_AVWH Address Setup to WE#
3 120
50
150
50
ns
Going High
t_DVWH Data Setup to WE# Going 4 120
50
150
50
ns
High
t_WLWH WE# Pulse Width
120
50
150
50
ns
t_WHDX Data Hold Time from
4
0
0
0
0
ns
WE# High
t_WHAX Address Hold Time from
3
0
0
0
0
ns
WE# High
t_WHEH CE# Hold Time from WE#
0
0
0
0
ns
High
t_WHWL WE# Pulse Width High
30
30
30
30
ns
t_WHQV1 Word/Byte Program Time 2,5
6
6
6
6
µs
t_WHQV2 Erase Duration (Boot)
2,5,6 0.3
0.3
0.3
0.3
s
t_WHQV3 Erase Duration (Param)
2,5 0.3
0.3
0.3
0.3
s
t_WHQV4 Erase Duration (Main)
2,5 0.6
0.6
0.6
0.6
s
t_QVVL VPP Hold from Valid SRD 5,8
0
0
0
0
ns
t_QVPH
RP# VHH Hold from Valid
SRD
6,8
0
0
0
0
ns
t_PHBR Boot-Block Lock Delay
7,8
200
100
200
100 ns
38
PRELIMINARY