316963-002 Datasheet, PDF (33/100 Pages) Intel Corporation – Supporting the Intel Celeron processor

Electrical Specifications
Figure 6.
Differential Clock Waveform
Threshold
Region
Tph
BCLK1
V_{CROSS (ABS})
V_{CROSS (ABS})
Ringback
Margin
BCLK0
Tpl
Tp
Tp = T1: BCLK[1:0] period
T2: BCLK[1:0] period stability (not shown)
Tph = T3: BCLK[1:0] pulse high time
Tpl = T4: BCLK[1:0] pulse low time
T5: BCLK[1:0] rise time through the threshold region
T6: BCLK[1:0] fall time through the threshold region
Overshoot
VH
Rising Edge
Ringback
Falling Edge
Ringback
VL
Undershoot
Figure 7. Differential Clock Crosspoint Specification
650
600
550
500
550 + 0.5 (VHavg - 700)
450
550 mV
400
250 + 0.5 (VHavg - 700)
350
300
250 mV
250
200
660 670 680 690 700 710 720 730 740 750 760 770 780 790 800 810 820 830 840 850
VHavg (mV)
Datasheet
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