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82562ET Datasheet, PDF (3/21 Pages) Intel Corporation – 82562ET 10/100 Mbps Platform LAN Connect (PLC) | |||
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Networking Silicon â 82562ET
Revision History
Revision
1.3
1.2
1.1
1.0
0.6
0.55
Revision Date
Description
March 2003
October 2001
June 2000
Added product ordering code in Section 1.0.
Removed confidential status.
⢠Removed sections: âPhysical Layer Interface Functionalityâ and âPlatform
LAN Connectâ.
⢠Changed âElectrical and Timing Specificationsâ section to âVoltage and Tem-
perature Specificationsâ and removed timing specifications.
Advance Information Datasheet release (Intel Confidential).
⢠On cover page, replaced Boundary Scan Support with XOR tree mode sup-
port. Added bullet for LAN Connect I/F.
⢠Pg. 3, added a Solution Block Diagram as included in OR-2338 Pg. 4 but
replaced EM with ET in diagram.
⢠Pg. 11, removed Figure 4, âNRZ to MLT-3 Encoding Diagramâ.
⢠Pg. 35, changed the Rev. number on the 82562 Pinout symbol to 1.0.
May 2000
Advance Information Datasheet release (Intel Secret).
⢠Modified Table 1 â82562ET Hardware Configurationâ to add one row for XOR
Tree and include column for comments.
⢠Updated the descrition of the Activity LED signal in Section 3.6, âLED Pinsâ.
⢠Revised Section 3.7, âMiscellaneous Control Pinsâ to reflect references to
Table 1 â82562ET Hardware Configurationâ.
⢠Updated Section 4.0, âVoltage and Temperature Specificationsâ.
⢠Replaced diagrams in Section 5.1, âPackage Informationâ.
Nov. 1999
⢠Corrected Figure 4 âNRZ to MLT-3 Encoding Diagram on Pg. 11 to reflect
correct signal transitions.
⢠Removed â10BASE-T Error Detection and Reportingâ section since the
82562 does not do 10BASE-T error reporting.
Sept. 1999 Initial release.
Datasheet
iii
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