316966-002 Datasheet, PDF (286/437 Pages) Intel Corporation – Graphics and Memory Controller Hub

Integrated Graphics Device Registers (D2:F0,F1)
(Intel® 82Q35, 82Q33, 82G33 GMCH Only)
8.2.27
SWSMI—Mirror of Func0 Software SMI
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/2/1/PCI
E0–E1h
0000h
RO
16 bits
As long as there is the potential that DVO port legacy drivers exist which expect this
register at this address, D2:F0 address E0h–E1h must be reserved for this register.
Bit
15:8
7:1
0
Access &
Default
RO
00h
RO
00h
RO
0b
Description
Software Scratch Bits (SWSB):
Software Flag (SWF): This field is used to indicate caller and SMI
function desired, as well as return result.
GMCH Software SMI Event (GSSMIE): When Set, this bit will
trigger an SMI. Software must write a 0 to clear this bit.
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