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M80C287 Datasheet, PDF (28/29 Pages) Intel Corporation – 80-BIT CHMOS III NUMERIC PROCESSOR EXTENSION
M80C287
M80C287 Extension to the CPU’s Instruction Set (Continued)
Instruction
Byte
0
Encoding
Byte
1
Optional
Bytes 2 – 3
Clock Count Range
TRANSCENDENTAL
FCOS e Cosine of ST(0)
ESC 001
1111 1111
130 – 77910
FPTAN11 e Partial tangent of ST(0)
ESC 001
1111 0010
198 – 504j
FPATAN e Partial arctangent
ESC 001
1111 0011
321 – 494
FSIN e Sine of ST(0)
ESC 001
1111 1110
129 – 77810
FSINCOS e Sine and cosine of ST(0)
ESC 001
1111 1011
201 – 81610
F2XM112 e 2ST(0) b 1
ESC 001
1111 0000
215 – 483
FYL2X13 e ST(1) log2(ST(0))
FYL2XP114 e ST(1) log2(ST(0) a 1 0)
PROCESSOR CONTROL
ESC 001
ESC 001
1111 0001
1111 1001
127 – 545
264 – 554
FINIT e Initialize NPX
ESC 011
1110 0011
25
FSETPM e Set protected mode
ESC 011
1110 0100
12
FRSTPM e Reset protected mode
ESC 011
1111 0100
12
FSTSW AX e Store status word
ESC 111
1110 0000
18
FLDCW e Load control word
ESC 001
MOD 101 R M
SIB DISP
33
FSTCW e Store control word
ESC 101
MOD 111 R M
SIB DISP
18
FSTSW e Store status word
ESC 101
MOD 111 R M
SIB DISP
18
FCLEX e Clear exceptions
FSTENV e Store environment
FLDENV e Load environment
FSAVE e Save state
FRSTOR e Restore state
FINCSTP e Increment stack pointer
FDECSTP e Decrement stack pointer
FFREE e Free ST(12)
FNOP e No operations
ESC 011
ESC 001
ESC 001
ESC 101
ESC 101
ESC 001
ESC 001
ESC 101
ESC 001
1110 0010
MOD 110 R M
MOD 100 R M
MOD 110 R M
MOD 100 R M
1111 0111
1111 0110
1100 0 ST(12)
1101 0000
SIB DISP
SIB DISP
SIB DISP
SIB DISP
8
192 – 193
85
521 – 522
396
28
29
25
19
Shaded areas indicate instructions not available in M8087 M80287
NOTES
l l 10 These timings hold for operands in the range x k q 4 For operands not in this range up to 78 additional clocks may
be needed to reduce the operand
l l 11 0 s ST(0) k 263
12 b1 0 s ST(0) s 1 0
13 0 s ST(0) k % b% k ST(1) k a %
l l 14 0 s ST(0) k (2 b SQRT(2)) 2 b% k ST(1) k a %
28