A28F400BX-T Datasheet, PDF (25/34 Pages) Intel Corporation – 4-MBIT 256K x16, 512K x8 BOOT BLOCK FLASH MEMORY FAMILY

A28F400BX-T B
DC CHARACTERISTICS (Continued)
Symbol
Parameter
Notes Min Typ Max Unit
Test Condition
V_OH
Output High Voltage
24
V V_CC ^e V_CC Min
I_OH ^{e b}2 5 mA
V_PPL
V_PP during Normal Operations
3 00
65 V
V_PPH V_PP during Erase Write Operations 7 11 4 12 0 12 6 V
V_LKO V_CC Erase Write Lock Voltage
20
V
V_HH
RP Unlock Voltage
11 5
13 0 V Boot Block Write Erase
CAPACITANCE⁽⁴⁾ T_A ^e 25 C f ^e 1 MHz
Symbol
Parameter
Typ
Max
Unit
Condition
C_IN
C_OUT
Input Capacitance
6
8
pF
V_IN ^e 0V
Output Capacitance
10
12
pF
V_OUT ^e 0V
NOTES
1 All currents are in RMS unless otherwise noted Typical values at V_CC e 5 0V V_PP e 12 0V T e 25 C These currents
are valid for all product versions (packages and speeds)
2 I_CCES is specified with the device deselected If the device is read while in Erase Suspend Mode current draw is the sum
of I_CCES and I_CCR
3 Block Erases and Word Byte Writes are inhibited when V_PP e V_PPL and not guaranteed in the range between V_PPH and
V_PPL
4 Sampled not 100% tested
5 Automatic Power Savings (APS) reduces I_CCR to less than 1 mA typical in static operation
6 CMOS Inputs are either V_CC g0 2V or GND g0 2V TTL Inputs are either V_IL or V_IH
7 V_PP e 12 0V g 5% for applications requiring 1 000 block erase cycles
STANDARD TEST CONFIGURATION
STANDARD
AC INPUT OUTPUT REFERENCE WAVEFORM
STANDARD
AC TESTING LOAD CIRCUIT
290501 – 12
AC test inputs are driven at V_OH (2 4 V_TTL) for a Logic ‘‘1’’ and V_OL
(0 45 V_TTL) for a logic ‘‘0’’ Input timing begins at V_IH (2 0 V_TTL) and V_IL
(0 8 V_TTL) Output timing ends at V_IH and V_IL Input rise and fall times (10%
to 90%) ^k 10 ns
290501 – 13
C_L e 100 pF
C_L Includes Jig Capacitance
R_L e 3 3 KX
25