8088 Datasheet, PDF (22/30 Pages) Intel Corporation – 8-BIT HMOS MICROPROCESSOR

8088
A C CHARACTERISTICS (Continued)
TIMING RESPONSES
Symbol
Parameter
8088
Min
Max
8088-2
Min
Max ^Units
Test
Conditions
TCLML Command Active Delay
(Note 1)
10
35
10
35 ns
TCLMH Command Inactive Delay
(Note 1)
10
35
10
35 ns
TRYHSH READY Active to
Status Passive (Note 3)
110
65 ns
TCHSV Status Active Delay
10
110
10
60 ns
TCLSH Status Inactive Delay
10
130
10
70 ns
TCLAV Address Valid Delay
10
110
10
60 ns
TCLAX Address Hold Time
10
10
ns
TCLAZ Address Float Delay
TCLAX 80 TCLAX 50 ns
TSVLH Status Valid to ALE High
(Note 1)
15
15 ns
TSVMCH Status Valid to MCE High
(Note 1)
15
15 ns
TCLLH CLK Low to ALE Valid
(Note 1)
15
15 ns
TCLMCH CLK Low to MCE (Note 1)
15
15 ns
TCHLL ALE Inactive Delay (Note 1)
15
15 ns
TCLMCL MCE Inactive Delay (Note 1)
15
15 ns
TCLDV Data Valid Delay
10
110
10
60 ns
TCHDX
TCVNV
TCVNX
Data Hold Time
Control Active Delay
(Note 1)
Control Inactive Delay
(Note 1)
10
10
ns
5
45
5
45
ns
C_L ^e 20 – 100 pF for
All 8088 Outputs
in Addition to
10
45
10
45 ns _{Internal Loads}
TAZRL Address Float to
0
0
ns
Read Active
TCLRL RD Active Delay
10
165
10
100 ns
TCLRH RD Inactive Delay
10
150
10
80 ns
TRHAV RD Inactive to Next
Address Active
TCLCL^b45
TCLCL^b40
ns
TCHDTL Direction Control
Active Delay (Note 1)
50
50 ns
TCHDTH Direction Control
Inactive Delay (Note 1)
30
30 ns
TCLGL GT Active Delay
85
50 ns
TCLGH GT Inactive Delay
85
50 ns
TRLRH RD Width
2TCLCL^b75
2TCLCL^b50
ns
TOLOH Output Rise Time
20
20 ns From 0 8V to 2 0V
TOHOL Output Fall Time
12
12 ns From 2 0V to 0 8V
NOTES
1 Signal at 8284 or 8288 shown for reference only
2 Setup requirement for asynchronous signal only to guarantee recognition at next CLK
3 Applies only to T3 and wait states
4 Applies only to T2 state (8 ns into T3 state)
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