82541PI Datasheet, PDF (2/2 Pages) Intel Corporation – Intel® 82541PI Gigabit Ethernet Controller

Product Brief Intel^® 82541PI Gigabit Ethernet Controller
Features
PCI Bus Features
I _{PCI revision 2.3, 32-bit, 33/66MHz}
I _{CLKRUN# Signal}
Gigabit MAC/PHY Advanced Features
I _{64KB configurable RX and TX packet FIFO}
I _{IEEE 802.3x-compliant flow-control support with software-controllable thresholds}
I _{Programmable host memory receive buffers (256B to 16KB)}
I _{IEEE 802.3ab Auto-Negotiation}
I _{State-of-the-art DSP/analog architecture}
I _{PHY detects polarity, MDI-X, 2 pair vs. 4 pair cables}
Host Offloading Features
I _{TCP segmentation (LSO), TCP and UDP checksum off-loading}
I _{IEEE 802.1Q VLAN support with VLAN tag insertion and stripping and packet}
filtering for up to 4096 VLAN tags
I _{Jumbo frame support up to 16KB}
I _{Interrupt moderation controls}
Manageability Features
I _{On-chip SMBus 2.0 port}
I _{ASF 1.0 and 2.0}
I _{Compliance with PCI Power Management v1.1/ACPI v2.0}
I _{Wake on LAN* (WoL) support}
I _{Automatic link speed switching from 1000Mb/s down to 10 or 100Mb/s in standby}
I _{Smart Power Down mode when no signal is detected on the wire}
I _{Power Save mode switches link speed from 1000Mb/s down to 10 or 100Mb/s}
when on battery power
Additional Device Features
I _{Four programmable LED outputs}
I _{On-chip power regulator control circuitry}
I _{BIOS LAN Disable Pin}
Benefits
I _{Application flexibility in LOM or embedded use}
I _{PCI clock suspension for low-power mobile design}
I _{FIFO size tunable to the application}
I _{Reduced frame loss due to receive FIFO overrun}
I _{Efficient usage of system resources}
I _{Automatic link configuration including speed, duplex, and flow control}
I _{Implements digital adaptive equalization, echo, cross-talk and baseline wander cancellation}
I _{Easier network installation and maintenance}
I _{Increased throughput and lower CPU utilization. Compatible with large send offload}
on RX and TX feature found in Windows* 2000 and Windows* XP
I _{Enables IT staff to easily create multiple virtual LAN segments}
I _{High throughput for large data transfers on networks supporting jumbo frames}
I _{Reduces the number of interrupts generated by receive and transmit operations}
I _{Enables IPMI and ASF implementations}
I _{Provides advanced alerting and remote-control capabilities with industry-standard interfaces}
I _{PCI power management capability requirements for PC and embedded applications}
I _{Packet recognition and wakeup for network adapter and LOM applications}
without software configuration
I _{Supports power-down states without software assistance}
I _{Low power in standby states}
I _{Enables very low-power mobile or battery}
I _{Manages power consumption based on power source}
I _{Longer battery life for battery-powered implementations}
I _{Customizable indications for link speed, activity, duplex, collisions, and port ID on each port}
I _{Simplified low-cost power supply design}
I _{Enables low-power LAN disable for LOM applications}
Characteristics
Electrical
I _{Typical targeted power dissipation}
Environmental
I _{Operating temperature}
I _{Storage temperature}
Physical
I _Package
I _{Footprint-compatible with Intel}^® _{82540EM, 82540EP, 82541EI and 82541GI}
Gigabit Ethernet Controllers
I _{Footprint-compatible with Intel}^® _{82551QM, 82562EZ and 82562EX Fast Ethernet Controllers}
I _{1.0W at D0 1000Mbps}
I _{100mW at D3 100Mbps}
I _{50mW at D3 wakeup disabled}
I _{0°C to 70°C (maximum); does not require a heat sink or forced airflow}
I _{-65°C to 140°C}
I _{196-pin PBGA, 1mm ball pitch, 15x15mm (simplifies LOM board designs)}
I _{Enables easy migration}
I _{Enables a Gigabit Ethernet or 10/100 LOM implementation on the same board}
Order Code
I _GD82541PI
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Copyright © 2004 Intel Corporation. All rights reserved.
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