A28F200BX-T Datasheet, PDF (17/33 Pages) Intel Corporation – 2-MBIT (128K x 16, 256K x 8) BOOT BLOCK FLASH MEMORY FAMILY

A28F200BX-T B
290500 – 5
Bus
Command
Operation
Comments
Write
Write
Setup
Program
Program
Data e 40H
Address e Byte to be
programmed
Data to be programmed
Address e Byte to be
programmed
Read
Status Register Data
Toggle OE or CE to update
Status Register
Standby
Check SR 7
1 e Ready 0 e Busy
Repeat for subsequent bytes
Full status check can be done after each byte or after a
sequence of bytes
Write FFH after the last byte programming operation to
reset the device to Read Array Mode
Full Status Check Procedure
Bus
Operation
Command
Comments
Standby
Check SR 3
1 e V_PP Low Detect
Standby
Check SR 4
1 e Byte Program Error
290500 – 6
SR 3 MUST be cleared if set during a program attempt
before further attempts are allowed by the Write State
Machine
SR 4 is only cleared by the Clear Status Register
Command in cases where multiple bytes are programmed
before full status is checked
If error is detected clear the Status Register before
attempting retry or other error recovery
Figure 6 Automated Byte Programming Flowchart
17