8XL196NP Datasheet, PDF (17/34 Pages) Intel Corporation – COMMERCIAL CHMOS 16-BIT MICROCONTROLLER

8XL196NP COMMERCIAL CHMOS 16-BIT MICROCONTROLLER
4.0 ADDRESS MAP
Table 7. 8XL196NP Address Map
Address
(Note 1)
Description
Notes
FF FFFFH
FF 3000H
External device (memory or I/O) connected to address/data bus
2
FF 2FFFH Internal ROM or external device (memory or I/O) connected to address/data bus
FF 2000H (determined by EA# pin)
2, 3
FF 1FFFH
FF 0100H
External device (memory or I/O) connected to address/data bus
2
FF 00FFH
FF 0000H
Reserved for ICE
4
FE FFFFH Overlaid memory (reserved for future devices);
0F 0000H locations xF0000–xF00FFH are reserved for ICE
2
0E FFFFH
01 0000H
896 Kbytes of external device (memory or I/O) connected to address/data bus
2
00 FFFFH
00 3000H
External device (memory or I/O) connected to address/data bus
2
00 2FFFH External device (memory or I/O) connected to address/data bus or
00 2000H remapped internal ROM
2, 5, 6
00 1FFFH
00 1FE0H
Memory-mapped peripheral special-function registers (SFRs)
2, 4, 7
00 1FDFH
00 1F00H
Internal peripheral special-function registers (SFRs)
4, 7, 9
00 1EFFH
00 0400H
External device (memory or I/O) (reserved for future devices)
6
00 03FFH
00 0100H
Upper register file (general-purpose register RAM)
8, 9
00 00FFH
00 0018H
Lower register file (general-purpose register RAM and stack pointer)
8, 10
00 0017H
00 0000H
Lower register file (CPU SFRs)
4, 7, 8, 10
NOTES:
1. Internally, there are 24 address bits (A23:0); however, only 20 address lines (A19:0) are bonded out.
The external address space is 1 Mbyte (00000–FFFFFH).
2. Address with indirect, indexed, or extended modes.
3. The 8XL196NP resets to internal address FF2080H (FF2080H in internal ROM or F2080H in external
memory).
4. Unless otherwise noted, write 0FFH to reserved memory locations and write 0 to reserved SFR bits.
5. These areas are mapped into internal ROM if the REMAP bit (CCB1.2) is set and EA# is at logic 1.
Otherwise, they are mapped to external memory.
6. WARNING: The contents or functions of these memory locations may change with future device revi-
sions, in which case a program that relies on one or more of these locations may not function properly.
7. Refer to the 8XC196NP, 80C196NU Microcontroller User’s Manual.
8. Code executed in locations 000000H to 0003FFH will be forced external.
9. Address with indirect, indexed, or extended modes or through register windows.
10. Address with direct, indirect, indexed, or extended modes.
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