8XL51FA Datasheet, PDF (16/20 Pages) Intel Corporation – LOW VOLTAGE CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLERS

8XL51FA FB FC
PROGRAMMING THE OTP ROM
To be programmed the part must be running with a
4 to 6 MHz oscillator (The reason the oscillator
needs to be running is that the internal bus is being
used to transfer address and program data to appro-
priate internal OTP ROM locations ) The address of
an OTP ROM location to be programmed is applied
to Port 1 and pins P2 0 - P2 4 of Port 2 while the
code byte to be programmed into that location is
applied to Port 0 The other Port 2 and 3 pins RST
PSEN and EA V_PP should be held at the ‘‘Program’’
levels indicated in Table 3 ALE PROG is pulsed low
to program the code byte into the addressed OTP
ROM location The setup is shown in Figure 10
Normally EA V_PP is held at logic high until just be-
fore ALE PROG is to be pulsed Then EA V_PP is
raised to V_PP ALE PROG is pulsed low and then
EA V_PP is returned to a valid high voltage The volt-
age on the EA V_PP pin must be at the valid EA V_PP
high level before a verify is attempted Waveforms
and detailed timing specifications are shown in later
sections of this data sheet
NOTE
 EA V_PP pin must not be allowed to go above the
maximum specified V_PP level for any amount of
time Even a narrow glitch above that voltage lev-
el can cause permanent damage to the device
The V_PP source should be well regulated and free
of glitches
Table 3 OTP ROM Programming Modes
(H ^e 2 7V to 3 6V H1 ^e 5V g10%)
Mode
Program Code Data
RST
PSEN
ALE
PROG
EA
V_PP
P2 6 P2 7 P3 3 P3 6 P3 7 V_CC
H1
L
12 75V L
H1 H1 H1 H1 H1
Verify Code Data
H
L
H
H
L
L
L
H
H
H
Program Encryption
H1
L
Array Address 0–3FH
12 75V L
H1 H1
L
H1 H1
Program Lock Bit 1 H1
L
Bits
Bit 2 H1
L
12 75V H1 H1 H1 H1 H1 H1
12 75V H1 H1 H1
L
L H1
Bit 3 H1
L
12 75V H1
L
H1 H1
L
H1
Read Signature Byte
H
L
H
H
L
L
L
L
L
H
See Table 2 for proper input on these pins
Figure 10 Programming the OTP ROM
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