8XC196NP Datasheet, PDF (11/51 Pages) Intel Corporation – COMMERCIAL CHMOS 16-BIT MICROCONTROLLER

8XC196NP COMMERCIAL CHMOS 16-BIT MICROCONTROLLER
PIN DESCRIPTIONS
Table 8. Pin Descriptions
Name
A15:0
A19:16
Type
Description
I/O System Address Bus
These address lines provide address bits 0–15 during the entire
external memory cycle during both multiplexed and demultiplexed
bus modes.
I/O Address Lines 16–19
These address lines provide address bits 16–19 during the entire
external memory cycle, supporting extended addressing of the 1-
Mbyte address space.
Multiplexed
with
—
EPORT.3:0
AD15:0
Internally, there are 24 address bits; however, only 20 address lines
(A19:0) are bonded out. The external address space is 1 Mbyte
(00000–FFFFFH) and the internal address space is 16 Mbytes
(000000–FFFFFFH). The 8XC196NP resets to internal address
FF2080H (FF2080H in internal ROM or F2080H in external
memory).
I/O Address/Data Lines
—
The function of these pins depends on the bus size and mode.
16-bit Multiplexed Bus Mode:
AD15:0 drive address bits 0–15 during the first half of the bus cycle
and drive or receive data during the second half of the bus cycle.
8-bit Multiplexed Bus Mode:
AD15:8 drive address bits 8–15 during the entire bus cycle. AD7:0
drive address bits 0–7 during the first half of the bus cycle and drive
or receive data during the second half of the bus cycle.
16-bit Demultiplexed Mode:
AD15:0 drive or receive data during the entire bus cycle.
8-bit Demultiplexed Mode:
AD7:0 drive or receive data during the entire bus cycle. AD15:8
drive the data that is currently on the high byte of the internal bus.
ALE
O Address Latch Enable
—
This active-high output signal is asserted only during external
memory cycles. ALE signals the start of an external bus cycle and
indicates that valid address information is available on the system
address/data bus (A19:16 and AD15:0 for a multiplexed bus; A19:0
for a demultiplexed bus). ALE differs from ADV# in that it does not
remain active during the entire bus cycle.
An external latch can use this signal to demultiplex the address bits
0–15 from the address/data bus in multiplexed mode.
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