M80C286 Datasheet, PDF (1/60 Pages) Intel Corporation – HIGH PERFORMANCE CHMOS MICROPROCESSOR WITH MEMORY MANAGEMENT AND PROTECTION

M80C286
HIGH PERFORMANCE CHMOS MICROPROCESSOR
WITH MEMORY MANAGEMENT AND PROTECTION
Military
Y High Speed CHMOS III Technology
Y Pin for Pin Clock for Clock and
Functionally Compatible with the HMOS
M80286
(See M80286 Data Sheet Order 271028-003)
Y Stop Clock Capability
Uses Less Power (see I_CCS
Specification)
Y 10 MHz Clock Rate
Y 68 Lead Pin Grid Array Package
Y 68 Lead Ceramic Quad Flatpack
Package
(See Packaging Spec Order 231369)
Y Military Temperature Range
b_{55 C to} a_{125 C (TC)}
INTRODUCTION
The M80C286 is an advanced 16 bit CHMOS III microprocessor designed for multi-user and multi-tasking
applications that require low power and high performance The M80C286 is fully compatible with its predeces-
sor the HMOS M80286 and object-code compatible with the M8086 and M80386 family of products In
addition the M80C286 has a power down mode which uses less power making it ideal for mobile applications
The M80C286 has built-in memory protection that maintains a four level protection mechanism for task isola-
tion a hardware task switching facility and memory mangement capabilities that map 2³⁰ bytes (one gigabyte)
of virtual address space per task (per user) into 2²⁴ bytes (16 megabytes) of physical memory
The M80C286 is upward compatible with M8086 and M8088 software Using M8086 real address mode the
M80C286 is object code compatible with existing M8086 M8088 software In protected virtual address mode
the M80C286 is source code compatible with M8086 M8088 software which may require upgrading to use
virtual addresses supported by the M80C286’s integrated memory management and protection mechanism
Both modes operate at full M80C286 performance and execute a superset of the M8086 and M8088 instruc-
tions
The M80C286 provides special operations to support the efficient implementation and execution of operating
systems For example one instruction can end execution of one task save its state switch to a new task load
its state and start execution of the new task The M80C286 also supports virtual memory systems by providing
a segment-not-present exception and restartable instructions
February 1990
Figure 1 M80C286 Internal Block Diagram
271103 – 1
Order Number 271103-001