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80333 Datasheet, PDF (1/75 Pages) Intel Corporation – I/O Processor | |||
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Intel® 80333 I/O Processor
Datasheet
Product Features
â Integrated Intel XScale® core
â 500, 667 and 800 MHz
â ARM* V5TE Compliant
â 32 KByte, 32-way Set Associative
Instruction Cache with cache locking
â 32 KByte, 32-way Set Associative Data
Cache with cache locking. Supports
write through or write back
â 2 KByte, 2-way Set Associative Mini-
Data Cache
â 128-Entry Branch Target Buffer
â 8-Entry Write Buffer
â 4-Entry Fill and Pend Buffer
â Performance Monitor Unit
â Internal Bus 333 MHz/64-bit
â PCI Express*-to-PCI Bridges
â x8 PCI Express* Upstream Link
â PCI Express* Specification 1.0a
compliant
â PCI-X Bus A (IOP bus - ATU interface)
â PCI-X Bus B (Slot Expansion bus)
supports standard PCI Hot-Plug
Controller
â Four output clocks per PCI-X bus
â Address Translation Unit
â 2 KB or 4 KB Outbound Read Queue
â 4 KB Outbound Write Queue
â 4 KB Inbound Read and Write Queue
â Connects Internal Bus to PCI/X Bus A
â Messaging Unit and Expansion ROM
â Two Programmable 32-bit Timers and
Watchdog Timer
â Eight General Purpose I/O Pins
â Two I2C Bus Interface Units
â Dual-Ported Memory Controller
â PC2700 Double Data Rate (DDR333)
SDRAM
â DDRII 400 SDRAM
â Up to 2 GB of 64-bit DDR333
â Up to 1 GB of 64-bit DDRII400
â Optional Single-bit Error Correction,
Multi-bit Detection Support (ECC)
â Supports Unbuffered or Registered
DIMMs and Discrete SDRAM
â 32-bit memory support
â DMA Controller
â Two Independent Channels Connected
to Internal Bus
â Two 1KB Queues in Ch0 and Ch1
â CRC-32C Calculation
â Application Accelerator Unit
â RAID6 support
â Performs optional XOR on Read Data
â Compute Parity Across Local Memory
Blocks
â 1 KB/512 byte Store Queue
â Two UART (16550) Units
â 64-byte Receive and Transmit FIFOs
â 4-pin, Master/Slave Capable
â Peripheral Bus Interface
â 8-/16-bit Data Bus with Two Chip Selects
â Interrupt Controller Unit
â Four Priority Levels
â Vector Generation
â Sixteen External Interrupt Pins with
High Priority Interrupt (HPI#)
â 829-Ball, Flip Chip Ball Grid Array (FCBGA)
â 37.5 mm2 and 1.27 mm ball pitch
Order Number: 305433, Revision: 003US
July 2005
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