IW4040B Datasheet, PDF (1/7 Pages) Integral Corp. – 12-Stage Binary Ripple Counter

TECHNICAL DATA
IW4040B
12-Stage Binary Ripple Counter
High-Voltage Silicon-Gate CMOS
The IW4040B is ripple-carry binary counter. All counter stages are
master-slave flip-flops. The state of a counter advances one count on the
negative transition of each input pulse; a high level on the RESET line resets
the counter to its all zeros state. Schmitt trigger action on the input-pulse
line permits unlimited rise and fall times.
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 µA at 18 V over full package-temperature
range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
LOGIC DIAGRAM
N SUFFIX
PLASTIC DIP
16
1
16
1
ORDERING INFORMATION
IW4040BN Plastic DIP
IW4040BD SOIC
IZ4040B chip
T_A = -55° to 125° C
for all packages
CLOCK ¹⁰
11
RESET
9
Q1
7
Q2
6
Q3
5 _Q4
3
Q5
2
Q6
4 _Q7
13 _Q8
12
Q9
14 _Q10
15
Q11
1
Q12
PIN 16 =V_CC
PIN 8 = GND
PIN ASSIGNMENT
Q12 1
Q6 2
Q5 3
Q7 4
Q4 5
Q3 6
Q2 7
GND 8
16 ^V _CC
15 Q11
14 Q10
13 ^Q8
12 Q9
11 RESET
10 CLOCK
9 Q1
FUNCTION TABLE
Inputs
Clock Reset
L
L
X
H
H= high level
L = low level
X=don’t care
Output
Output state
No change
Advance to next
state
All Outputs are low
INTEGRAL
1