IN74HC574 Datasheet, PDF (1/5 Pages) Integral Corp. – Noninverting D Flip-Flop

TECHNICAL DATA
Octal 3-State
Noninverting D Flip-Flop
High-Performance Silicon-Gate CMOS
IN74HC574A
The IN74HC574A is identical in pinout to the LS/ALS574. The
device inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
Data meeting the setup time is clocked to the outputs with the
rising edge of the Clock. The Output Enable input does not affect the
states of the flip-flops, but when Output Enable is high, all device
outputs are forced to the high-impedance state; thus, data may be
stored even when the outputs are not enabled.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
IN74HC574AN Plastic
IN74HC574ADW SOIC
T_A = -55° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 20=V_CC
PIN 10 = GND
FUNCTION TABLE
Output
Enable
L
L
L
Inputs
Clock
L,H,
H
X
X = don’t care
Z = high impedance
Output
D
Q
H
H
L
L
X
no
change
X
Z
413