IN74HC123 Datasheet, PDF (1/6 Pages) Integral Corp. – DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATOR

IN74HC123
DUAL RETRIGGERABLE MONOSTABLE
MULTIVIBRATOR
The IN74HC123 is identical in pinout to the LS/ALS123. The
device inputs are compatible with standard CMOS outputs; with
pullup resistors, they are compatible with LS/ALSTTL outputs.
There are two trigger inputs, A INPUT (negative edge) and
B INPUT (positive edge). These inputs are valid for rising/falling
signals.
The device may also be triggered by using the CLR input
(positive-edge) because of the Schmitt-trigger input; after triggering
the output maintains the MONOSTABLE state for the time period
determined by the external resistor R_X and capacitor C_X. Taking
CRL low breaks this MONOSTABLE STATE. If the next trigger
pulse occurs during the MONOSTABLE period it makes the
MONOSTABLE period longer.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 3.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
IN74HC123N Plastic
IN74HC123D SOIC
T_A = -55° to 125° C for all
packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 16 =V_CC
PIN 8 = GND
Note
(1) C_X, R_X, D_X are external components.
(2) D_X is a clamping diode.
The external capacitor is charged to V_CC in the
stand-by state, i.e. no trigger. When the supply
voltage is turned off C_X is discharged mainly
through an internal parasitic diode. If C_X is
sufficiently large and V_CC decreases rapidy, there
will be some possibility of damaging the I.C. with
a surge current or latch-up. If the voltage supply
filter capacitor is large enough and V_CC decrease
slowly, the surge current is automatically limited
and damage the I.C. is avoided. The maximum
forward current of the parasitic diode is
approximately 20 mA.
1
FUNCTION TABLE
Inputs
Outputs Note
A B _CRL Q _Q
HH
Output
Enable
X L H L ^* H ^* Inhibit
H X H L ^* H ^* Inhibit
L
H
Output
Enable
LH
Output
Enable
X X L L H Inhibit
X = don’t care
* _{- except for monostable period}