IN74ACT74 Datasheet, PDF (1/5 Pages) Integral Corp. – DUAL D FLIP-FLOP WITH SET AND RESET

IN74ACT74
DUAL D FLIP-FLOP WITH SET AND RESET
High-Speed Silicon-Gate CMOS
The IN74ACT74 is identical in pinout to the LS/ALS74,
HC/HCT74. The IN74ACT74 may be used as a level converter
for interfacing TTL or NMOS outputs to High Speed CMOS
inputs.
This device consists of two D flip-flops with individual Set,
Reset, and Clock inputs. Information at a D-input is transferred to
the corresponding Q output on the next positive going edge of
the clock input. Both Q and Q outputs are available from each
flip-flop. The Set and Reset inputs are asynchronous.
• TTL/NMOS Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 µA; 0.1 µA @ 25°C
• Outputs Source/Sink 24 mA
ORDERING INFORMATION
IN74ACT74N Plastic
IN74ACT74D SOIC
T_A = -40° to 85° C for all
packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 14 =V_CC
PIN 7 = GND
FUNCTION TABLE
Inputs
Outputs
Set Rese Clock Data Q Q
t
LH
X
XHL
HL
X
X
L
H
L
L
X
X
H^*
H^*
HH
HH L
HH
L
L
H
HH
L
X No Change
HH
H
X No Change
HH
X No Change
*Both outputs will remain high as long as Set
and Reset are low, but the output states are
unpredictable if Set and Reset go high
simultaneously.
X = don’t care
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