IN74ACT175 Datasheet, PDF (1/5 Pages) Integral Corp. – Quad D Flip-Flop with Common Clock and Reset

TECHNICAL DATA
Quad D Flip-Flop with
Common Clock and Reset
High-Speed Silicon-Gate CMOS
IN74ACT175
The IN74ACT175 is identical in pinout to the LS/ALS175,
HC/HCT175. The IN74ACT175 may be used as a level converter for
interfacing TTL or NMOS outputs to High Speed CMOS inputs.
This device consists of four D flip-flops with common Reset and
Clock inputs, and separate D inputs. Reset (active-low) is
asynchronous and occurs when a low level is applied to the Reset
input. Information at a D input is transferred to the corresponding Q
output on the next positive-going edge of the Clock input.
• TTL/NMOS Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 µA; 0.1 µA @ 25°C
• Outputs Source/Sink 24 mA
ORDERING INFORMATION
IN74ACT175N Plastic
IN74ACT175D SOIC
T_A = -40° to 85° C for all
packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16=V_CC
PIN 8 = GND
FUNCTION TABLE
Inputs
Outputs
Reset Clock
D
QQ
L
X
X
LH
H
H
HL
H
L
LH
H
L
X no change
X = Don’t care
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