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IN74AC574 Datasheet, PDF (1/5 Pages) Integral Corp. – Octal 3-State Noninverting D Flip-Flop High-Performance Silicon-Gate CMOS
TECHNICAL DATA
Octal 3-State
Noninverting D Flip-Flop
High-Performance Silicon-Gate CMOS
IN74AC574
The IN74AC574 is identical in pinout to the LS/ALS574,
HC/HCT574. The device inputs are compatible with standard CMOS
outputs; with pullup resistors, they are compatible with LS/ALS
outputs.
Data meeting the setup time is clocked to the outputs with the
rising edge of the Clock. The Output Enable input does not affect the
states of the flip-flops, but when Output Enable is high, all device
outputs are forced to the high-impedance state; thus, data may be
stored even when the outputs are not enabled.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA; 0.1 µA @ 25°C
• High Noise Immunity Characteristic of CMOS Devices
• Outputs Source/Sink 24 mA
LOGIC DIAGRAM
ORDERING INFORMATION
IN74AC574N Plastic
IN74AC574DW SOIC
TA = -40° to 85° C for all
packages
PIN ASSIGNMENT
PIN 20=VCC
PIN 10 = GND
466
FUNCTION TABLE
Output
Enable
L
L
L
Inputs
Clock
L,H,
H
X
X = don’t care
Z = high impedance
Output
D
Q
H
H
L
L
X
no
change
X
Z