IN74AC174 Datasheet, PDF (1/5 Pages) Integral Corp. – Hex D Flip-Flop with Common Clock and Reset High-Speed Silicon-Gate CMOS

TECHNICAL DATA
Hex D Flip-Flop with
Common Clock and Reset
High-Speed Silicon-Gate CMOS
IN74AC174
The IN74AC174 is identical in pinout to the LS/ALS174,
HC/HCT174. The device inputs are compatible with standard CMOS
outputs; with pullup resistors, they are compatible with LS/ALS
outputs.
This device consists of six D flip-flops with common Clock and
Reset inputs. Each flip-flop is loaded with a low-to-high transition of
the Clock input. Reset is asynchronous and active-low.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA; 0.1 µA @ 25°C
• High Noise Immunity Characteristic of CMOS Devices
• Outputs Source/Sink 24mA
LOGIC DIAGRAM
ORDERING INFORMATION
IN74AC174N Plastic
IN74AC174D SOIC
T_A = -40° to 85° C for all
packages
PIN ASSIGNMENT
PIN 16=V_CC
PIN 8 = GND
254
FUNCTION TABLE
Inputs
Output
Reset Clock D
Q
L
X
X
L
H
H
H
H
L
L
H
L
X no change
H
X no change
X = Don’t care