IA2910A_08 Datasheet, PDF (9/21 Pages) InnovASIC, Inc – Microprogram Controller

IA2910A
Microprogram Controller
Data Sheet
August 19, 2008
I/O Signal Description
Table 1 below describes the I/O characteristics for each signal on the IC. The signal names
correspond to the signal names on the pinout diagrams provided.
Symbol
CLK
I(3:0)
CCn
CCENn
RLDn
OEn
CIN
FULLn
DIN(11:0)
YOUT(11:0)
PLn
MAPn
VECTn
Type Description
I Clock Input - Clock source for address register, microprogram
counter register, and stack file.
I Active high instruction bits. Selects instruction to be executed by the
IA2910A.
I Active low. Condition code. Used as test criterion, pass is low on
CCn.
I Active low. Condition code enable. When set high, CCn is ignored
and the IA2910A operates as it CCn were a low.
I Active low. Clock enable to address register, allows loading of
register/counter regardless of instruction or condition.
I Active low. Output enable, when high tri-states the output bus
YOUT.
I Active high. Carry in signal to the incrementer.
O Active low. Indicates there are nine items on the stack.
I Active high. Data bus input to the multiplexer.
O Active high. Data bus output from the IA2910A.
O Active low. Pipeline address enable. Selects source number one
(usually pipeline register) as direct input source.
O Active low. Map address enable. Selects source number two (usually
mapping PROM or PLA) as direct input source.
O Active low. Vector address enable. Selects source number three
(usually interrupt starting address) as direct input source.
Table 1
IA211030314-03
Page 9 of 21
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