TLF51801ELV Datasheet, PDF (9/29 Pages) Infineon Technologies AG – 10 A synchronous DC/DC Step-Down Controller

TLF51801ELV
5.2
The Soft start
Regulator
x0.6
+
UV
UV
Vfb
-
Vbg
EN
POR IVCC
TSD
Logic
start
Stair
SoSt_25%End
CK
Force
To_LG
min
SoSt_100%End
Toff
Vref1V2
CK
Figure 4 Soft start block diagram
An integrated Soft start function (of duration 512 clock cycles, where a clock cycle is derived from the switching
frequency) ensures that the inrush current will be limited and prevents from output voltage overshoots.
When the regulator starts from OFF state (EN pin forced from low to high), an additional pre-charging function is
triggered before Soft start: for a time slot of 64 clock cycles, low-side MOSFET is switched ON and OFF at fixed
frequency of 1.5 MHz and 50% duty cycle, in order to charge in advance the bootstrap capacitor.
If an under voltage appears during Soft start, it is recognized only after 25% of the Soft start stair, this is realized
by the signal SoSt_25%End. In case 1) the UV is permanent fault (i.e. the BTS cap is not charged or shorted, or
the output cap is shorted). In case 2) the UV failure is removed before the 25% of the Soft start procedure is
reached (i.e. the output cap is too large and the system is not able to charge it fast enough). In case 1), a
permanent UV, the soft start begins again the procedure after a delay of 512 clock cycles.
In case of pre-charged output condition, the system recognizes it and keeps the external switches in high
impedance in order not to discharge the output capacitance.
start
V re f1 V 2
SoSt_25% End
UV
start
V re f1 V 2
SoSt_25% End
UV
Figure 5 Soft start timing
Data sheet
1.2V
D e la y
1.2V
D e la y
i.e output
short
9
D e la y
Figure 1)
1.2V
Figure 2)
Rev. 1.0.1, 2013-04-15