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ICE2PCS05_10 Datasheet, PDF (9/20 Pages) Infineon Technologies AG – Standalone Power Factor Correction (PFC) Controller in Continuous Conduction Mode
CCM-PFC
ICE2PCS05/G
Functional Description
POUT(rated)
IC’s Normal
State Operation
POUT(max)
SOC PCL
VISENSE
0
-0.61V -0.75V -1.04V
Figure 8 SOC and PCL Protection as function of
VISENSE
The rated output power with a minimum VIN (VINMIN) is
POUT(rated) = VINMIN ´ -----0---.-6---1------
R1 × 2
Due to the internal parameter tolerance, the maximum
power with VINMIN is
POUT(max) = VINMIN ´ -----0---.-7---5------
R1 × 2
3.4.2 Peak Current Limit (PCL)
The IC provides a cycle by cycle peak current limitation
(PCL). It is active when the voltage at pin 3 (ISENSE)
reaches -1.04V. This voltage is amplified by OP1 by a
factor of -1.43 and connected to comparator C2 with a
reference voltage of 1.5V as shown in Figure 9. A
deglitcher with 300ns after the comparator improves
noise immunity to the activation of this protection.
connected) or an insufficient input voltage VIN for
normal operation. In this case, most of the blocks within
the IC will be shutdown. It is implemented using
comparator C3 with a threshold of 0.6V as shown in the
IC block diagram in Figure 2.
3.4.4 Over-Voltage Protection (OVP)
Whenever VOUT exceeds the rated value by 8%, the
over-voltage protection OVP is active as shown in
Figure 7. This is implemented by sensing the voltage at
pin VSENSE with respect to a reference voltage of
3.25V. A VSENSE voltage higher than 3.25V will
immediately turn off the gate, thereby preventing
damage to bus capacitor.
3.5 Frequency Setting
The switching frequency of the PFC converter can be
set with an external resistor R5 at FREQ pin as shown
Figure 10. The pin voltage VFREQ is typically 1.7V. The
corresponding capacitor for the oscillator is integrated
in the device and the R5/frequency relationship is given
at the “Electrical Characteristic” section. The
recommended operating frequency range is from
20kHz to 250kHz. As an example, a R5 of 33kW at pin
FREQ will set a switching frequency FSW of 134kHz
typically.
Full-wave
Rectifier
ISENSE
R2
IINDUCTOR
R1
Current Limit
1.5V
1.43x
OP1
Deglitcher
C2
300ns TurnOff
Driver
Figure 9 PeakICCEu2rrPeCnSt 0L1im/Git (PCL)
3.4.3
Open Loop Protection / Input Under
Voltage Protect (OLP)
Whenever VSENSE voltage falls below 0.6V, or
equivalently VOUT falls below 20% of its rated value, it
indicates an open loop condition (i.e. VSENSE pin not
Figure 10
Version 1.2
9
Frequency Versus RFREQ
22 Mar 2010