CCM-BOOST Datasheet, PDF (9/18 Pages) Infineon Technologies AG – CCM PFC Boost Converter Design

CCM PFC Boost Converter Design
Design Note DN 2013-01
V1.0 January 2013
A swinging choke design can address this, by using a medium permeability core (75-125μ) of core types
such as Arnold/Micrometals Sendust and Magnetics Inc. Kool Mu, of the right energy capability and
designing for full load permeability droop by 75-80%, so that with lighter load the inductance swings up. The
full details of this technique are beyond the scope of this design note, but it can be facilitated with available
design tools from core manufacturers [2]. An example of this with operating current points referenced key
line voltage points in one design example is shown in Figure 4.2.
Rectifier Bridge
The bridge total power loss is calculated using the average input current flowing through two of the bridge
rectifying diodes.
(5)
Recommendation: GBJ1006-BP. Using a higher rated current bridge can reduce the forward V_F, lowering
the total power dissipation at a small incremental cost. This is often a sound strategy, as with modern
components, the bridge rectifier usually has the highest total semiconductor loss for the PFC stage.
MOSFET
In order to select the the optimum MOSFET, one must understand the MOSFET requirements in a CCM
boost converter. High voltage MOSFETS have several families based on different technologies, which each
target a specific application, topology or operation. For a boost converter, the following are some major
MOSFET selection considerations:
 Low FOMs - R_on*Q_g and R_on*E_oss
 Fast Turn-on/off switching, gate plateau near middle of gate drive range (which balances turn-on and
turn-off losses)
 Low Output capacitance C_oss for low switching energy, to increase light load efficiency- this relates to the
R_on*E_oss metric.
 Switching and conduction losses must be balanced for minimum total loss - this is typically optimized at
the low line condition (if best thermals area desired), where worse case losses and temperature rise
occur. In other cases, it may be desired to optimize efficiency at a mid load condition, and ensure that
the thermal design is adequate for the worst case low-line dissipation. This varies with overall system
targets.
 VDS rating to handle spikes/overshoots
 Low thermal resistance R_thJC. Package selection must consider the resulting total thermal resistance from
junction to ambient, and the worst case surge dissipation- this is typically under low-line cycle skip and
recovery into highline while ramping the bulk voltage back up.
 Body diode speed and reverse recovery charge are not important, since body diode never conducts in a
boost converter.
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