ICE1PCS01 Datasheet, PDF (8/18 Pages) Infineon Technologies AG – Standalone Power Factor Correction (PFC) Controller in Continuous Conduction Mode (CCM)

Preliminary Data
CCM-PFC
ICE1PCS01/G
Functional Description
3.4 System Protection
The IC provides several protection features in order to
ensure the PFC system in safe operating range.
Depending on the input line voltage (V_IN) and output
bus voltage (V_OUT), Figure 6 and 7 show the conditions
when these protections are active.
P_OUT(rated)
P_OUT(max)
IC’s
State
Normal
Operation
BOP
(BOP occurs at V_ISENSE = -0.6V Max)
V_IN (VAC)
VCC > V_CCUVLO
V_INMIN(1)
VCC<V_CCUVLO
SOC PCL
V_ISENSE
0
-0.6V -0.73V -1.08V
IC’s
State
Normal
Operation
t
BOP ^{IC OFF}
(1) _{VINMIN where BOP activates depends on the output power}
Figure 6 V_IN Related Protection Features
V_OUT
V_OUT,Rated
105%
100%
50%
16%
t
PCL / SOC
OLP
OVP
OUV OLP
Figure 7 V_OUT Related Protection Features
The following sections describe the functionality of
these protection features.
3.4.1 Brown-Out Protection (BOP)
Brown-out occurs when the input voltage V_IN falls below
the minimum input voltage of the design (i.e. 85V for
universal input voltage range) and the VCC has not
entered into the V_CCUVLO level yet. For a system without
BOP, the boost converter will increasingly draw a
higher current from the mains at a given output power
which may exceed the maximum design values of the
input current. The ICE1PCS01/G limits internally the
current drawn from the mains and therefore also limits
the input power. The difference of input and output
power will result in decreasing output voltage. If the
condition prolongs, the decreasing V_OUT will terminate
in output under voltage condition (OUV, 50% of rated),
and the IC will be shut down (See section 3.4.5).
Figure 8 shows the occurrence of BOP in respect to the
ISENSE voltage.
Figure 8 BOP, SOC and PCL Protection as function
of V_ISENSE
The V_IN threshold for BOP to occur is dependent on the
voltage at ISENSE and thus the output power. The
rated output power with a minimum V_IN (V_INMIN) is
P_OUT(rated)
=
V_INMIN ×
--------⁰---^.-⁶---------
R1 ⋅ 2
Due to the internal parameter tolerance, the maximum
power with V_INMIN before BOP occurs is
P_OUT(max)
=
V_INMIN ×
------⁰---^.--⁷---³-------
R1 ⋅ 2
And the BOP takes over the normal operation under
rated output power latest at an input voltage of
V_BOPMAX
=
P_OUT(rated) ×
R_-----1_----⋅_----------2_--
0.73
3.4.2 Soft Over Current Control (SOC)
The IC is designed not to support any output power
that corresponds to a voltage lower than -0.73V at the
ISENSE pin. A further increase in the inductor current,
which results in a lower ISENSE voltage, will activate
the Soft Over Current Control (SOC). This is a soft
control as it does not directly switch off the gate drive
like the PCL. It acts on the nonlinear gain block to result
in a reduced PWM duty cycle.
3.4.3 Peak Current Limit (PCL)
The IC provides a cycle by cycle peak current limitation
(PCL). It is active when the voltage at pin 3 (ISENSE)
reaches -1.08V. This voltage is amplified by OP1 by a
factor of -1.43 and connected to comparator C2 with a
reference voltage of 1.5V as shown in Figure 9. A
deglitcher with 300ns after the comparator improves
noise immunity to the activation of this protection.
Preliminary Datasheet
8
28 May 2003