IFX7805 Datasheet, PDF (7/18 Pages) Infineon Technologies AG – Three Terminal 1.0A Positive Voltage Regulator

IFX7805
General Product Characteristics
4.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go
to www.jedec.org.
Pos. Parameter
Symbol
Limit Values
Unit Conditions
Min. Typ. Max.
PG-TO-252-3
4.3.1
4.3.2
4.3.3
Junction to Case¹⁾
Junction to Ambient
R_thJC
–
R_thJA
–
–
4
–
27
–
113 –
K/W –
K/W –²⁾
K/W Footprint Only
4.3.4
–
52
–
K/W 300mm² heatsink
area on PCB³⁾
4.3.5
–
42
–
K/W 600mm² heatsink
area on PCB
PG-TO-263-3
4.3.6
4.3.7
4.3.8
Junction to Case
Junction to Ambient
R_thJC
–
R_thJA
–
–
4
–
23
–
76
–
K/W –
K/W –
K/W Footprint Only
4.3.9
–
44
–
K/W 300mm² heatsink
area on PCB
4.3.10
–
35
–
K/W 600mm² heatsink
area on PCB
PG-TO-220-3
4.3.11
4.3.12
4.3.13
Junction to Case
Junction to Ambient
R_thJC
–
R_thJA
–
–
4
–
41
–
91
–
K/W –
K/W –
K/W Footprint Only
4.3.14
–
63
–
K/W 300mm² heatsink
area on PCB
4.3.15
–
58
–
K/W 600mm² heatsink
area on PCB
1) Not subject to production test, specified by design.
2) Specified R_thJA value is according to JEDEC JESD51-5,-7 at natural convection on FR4 2s2p board. The product (chip and
package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35 µm Cu).
3) Specified R_thJA value is according to JEDEC JESD51-3 at natural convection on FR4 1s0p board. The product (chip and
package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 1 copper layer (1 x 70µm Cu)
Datasheet
7
Rev. 1.0, 2013-07-15