IKCM20R60GD_15 Datasheet, PDF (6/16 Pages) Infineon Technologies AG – Control Integrated POwer System

CIPOS™ IKCM20R60GD
It is recommended for proper work of CIPOS™ not
to provide input pulse-width lower than 1us.
VFO (Fault-output, Pin 12)
The VFO pin indicates a module failure in case of
under voltage at pin VDD or in case of triggered
over current detection at ITRIP.
VDD
VFO
VSS
CIPOS
R_ON,FLT
From ITRIP - Latch
1
From UV detection
Figure 5: Internal circuit at pin VFO
ITRIP (Over current detection function, Pin 13)
CIPOS™ provides an over current detection
function by connecting the ITRIP input with the
motor current feedback. The ITRIP comparator
threshold (typ. 0.47V) is referenced to VSS ground.
A input noise filter (typ: t_ITRIPMIN = 530ns) prevents
the driver to detect false over-current events.
Over current detection generates a shut down of all
outputs of the gate driver after the shutdown
propagation delay of typically 1000ns.
The fault-clear time is set to typical 65us.
VDD, VSS (Low side control supply and
reference, Pin 11, 14)
VDD is the low side supply and it provides power
both to input logic and to low side output power
stage. Input logic is referenced to VSS ground.
The under-voltage circuit enables the device to
operate at power on when a supply voltage of at
least a typical voltage of V_DDUV+ = 12.1V is present.
The IC shuts down all the gate drivers’ power
outputs, when the VDD supply voltage is below
V_DDUV- = 10.4V. This prevents the external power
switches from critically low gate voltage levels
during on-state and therefore from excessive power
dissipation.
VB(A, B) and VS(A, B) (High side supplies,
Pin 3 - 6)
VB to VS is the high side supply voltage. The high
side circuit can float with respect to VSS following
the external high side power device emitter voltage.
Due to the low power consumption, the floating
driver stage is supplied by integrated bootstrap
circuit.
The under-voltage detection operates with a rising
supply threshold of typical V_BSUV+ = 12.1V and a
falling threshold of V_BSUV- = 10.4V.
VS(A, B) provide a high robustness against
negative voltage in respect of VSS of -50V
transiently. This ensures very stable designs even
under rough conditions.
NL (IGBT emitter, Pin 17)
The low side IGBT emitters are available for current
measurements. It is recommended to keep the
connection to pin VSS as short as possible in order
to avoid unnecessary inductive voltage drops.
NH (Diode anode, Pin 18)
The low side anodes of the integrated diodes are
connected.
P (Positive bus input voltage, Pin 23)
The high sides of IGBT are connected to the bus
voltage. It is noted that the bus voltage does not
exceed 450 V.
Datasheet
6
Ver. 1.0, 2015-06-01