English
Language : 

BTS54220-LBE Datasheet, PDF (57/72 Pages) Infineon Technologies AG – CMOS compatible parallel input pins for two channels
◁
BTS54220-LBE
Serial Peripheral Interface (SPI)
9.4
Electrical Characteristics
Unless otherwise specified: VS = 7 V to 18 V, Tj = -40 °C to +150 °C, VDD = 3.8 V to 5.5 V
Typical values: VS = 13.5 V, Tj = 25 °C, VDD = 4.3 V
Table 13 Electrical Characteristics Serial Peripheral Interface (SPI)
Parameter
Symbol
Min.
Values
Typ. Max.
Unit Note /
Test Condition
Input Characteristics (CS, SCLK, SI) - L Level of pin
CS
VCS(L)
-0.3
–
SCLK
VSCLK(L) -0.3
–
SI
VSI(L)
-0.3 –
Input Characteristics (CS, SCLK, SI) - H Level of pin
1.0
V VDD = 4.3 V
1.0
V VDD = 4.3 V
1.0
V VDD = 4.3 V
CS
VCS(H)
2.6
–
SCLK
VSCLK(H) 2.6
–
SI
VSI(H)
2.6
–
L-input pull-up current at CS pin -ICS(L)
7
30
H-input pull-up current at CS pin -ICS(H)
3
27
L-Input Pull-Down Current at Pin
VDD
V VDD = 4.3 V
VDD
V VDD = 4.3 V
VDD
V VDD = 4.3 V
75
μA VDD = 4.3 V
VCS = 1.0 V
75
μA VDD = 4.3 V
VCS = 2.6 V
SCLK
ISCLK(L)
3
SI
ISI(L)
3
H-Input Pull-Down Current at Pin
27
75
μA VSCLK = 1.0 V
VDD = 4.3 V
27
75
μA VSI = 1.0 V
VDD = 4.3 V
SCLK
SI
Output Characteristics (SO)
ISCLK(H)
7
ISI(H)
7
30
75
μA VSCLK = 2.6 V
VDD = 4.3 V
30
75
μA VSI = 2.6 V
VDD = 4.3 V
L level output voltage
H level output voltage
Output tristate leakage current
VSO(L)
VSO(H)
0
–
VDD - –
0.5 V
ISO(OFF)
-1
–
Timings
Enable lead time (falling CS to
tCS(lead)
200
–
rising SCLK)
Enable lag time (falling SCLK to tCS(lag)
200
–
rising CS)
Transfer delay time (rising CS to tCS(td)
1
–
falling CS)
0.5
V ISO = -0.5 mA
VDD
V ISO = 0.5 mA
VDD = 4.3 V
1
μA VCS =VDD
VSO = 0 V
VSO = VDD
–
ns –1)
–
ns –1)
–
μs –1)
Number
P_9.4.1
P_9.4.2
P_9.4.3
P_9.4.4
P_9.4.5
P_9.4.6
P_9.4.7
P_9.4.8
P_9.4.9
P_9.4.10
P_9.4.11
P_9.4.12
P_9.4.13
P_9.4.14
P_9.4.15
P_9.4.16
P_9.4.17
P_9.4.18
Data Sheet
57
Rev. 2.0, 2014-05-26
 ▷