C164CM Datasheet, PDF (56/68 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontrol ler

C164CM
C164SM
AC Characteristics
External Clock Drive XTAL1
(Operating Conditions apply)
Table 12 External Clock Drive Characteristics
Parameter
Symbol Direct Drive
1:1
Prescaler
2:1
PLL
Unit
1:N
min. max. min. max. min. max.
Oscillator period t_OSC SR 40
–
High time²⁾
t₁ SR 20³⁾ –
Low time²⁾
t₂ SR 20³⁾ –
Rise time²⁾
t₃ SR –
8
Fall time²⁾
t₄ SR –
8
20
–
6
–
6
–
–
5
–
5
60¹⁾ 500¹⁾ ns
10
–
ns
10
–
ns
–
10
ns
–
10
ns
1) _{The minimum and maximum oscillator periods for PLL operation depend on the selected CPU clock generation}
mode. Please see respective table above.
2) _{The clock input signal must reach the defined levels VIL2 and VIH2.}
3) _{The minimum high and low time refers to a duty cycle of 50%. The maximum operating frequency (fCPU) in}
direct drive mode depends on the duty cycle of the clock input signal.
t₁
0.5 V_DD
t₃
t₂
t _OSC
t₄
V_IH2
V_IL
MCT02534
Figure 13 External Clock Drive XTAL1
Note: If the on-chip oscillator is used together with a crystal, the oscillator frequency is
limited to a range of 4 MHz to 16 MHz.
It is strongly recommended to measure the oscillation allowance (or margin) in the
final target system (layout) to determine the optimum parameters for the oscillator
operation. Please refer to the limits specified by the crystal supplier.
When driven by an external clock signal it will accept the specified frequency
range. Operation at lower input frequencies is possible but is guaranteed by
design only (not 100% tested).
Data Sheet
52
V1.0, 2001-05