XC878CLM Datasheet, PDF (52/139 Pages) Infineon Technologies AG – 8-Bit Single-Chip Microcontroller

XC878CLM
Advance Information
Functional Description
3.2.4.8 Timer 2 Compare/Capture Unit Registers
The Timer 2 Compare/Capture Unit SFRs can be accessed in the standard memory area
(RMAP = 0).
Table 12 T2CCU Register Overview
Addr Register Name
Bit
7
6
5
4
3
2
1
0
RMAP = 0
C7_H
T2_PAGE
Page Register
Reset: 00_H Bit Field
Type
RMAP = 0, PAGE 0
C0_H
T2_T2CON
Reset: 00_H Bit Field
Timer 2 Control Register
Type
C1_H
T2_T2MOD
Reset: 00_H Bit Field
Timer 2 Mode Register
Type
C2_H
T2_RC2L
Reset: 00_H
Timer 2 Reload/Capture
Register Low
Bit Field
Type
C3_H
T2_RC2H
Reset: 00_H
Timer 2 Reload/Capture
Register High
Bit Field
Type
C4_H
T2_T2L
Reset: 00_H Bit Field
Timer 2 Register Low
Type
C5_H
T2_T2H
Reset: 00_H Bit Field
Timer 2 Register High
Type
C6_H
T2_T2CON1
Reset: 03_H Bit Field
Timer 2 Control Register 1
Type
RMAP = 0, PAGE 1
C0_H
T2CCU_CCEN Reset: 00_H
T2CCU Capture/Compare
Enable Register
Bit Field
Type
C1_H
T2CCU_CCTBSELReset: 00_H
T2CCU Capture/Compare Time
Base Select Register
Bit Field
Type
C2_H
T2CCU_CCTRELLReset: 00_H Bit Field
T2CCU Capture/Compare
Timer Reload Register Low
Type
C3_H
T2CCU_CCTRELHReset: 00_H Bit Field
T2CCU Capture/Compare
Timer Reload Register High
Type
C4_H
T2CCU_CCTL Reset: 00_H
T2CCU Capture/Compare
Timer Register Low
Bit Field
Type
OP
w
TF2 EXF2
rwh
T2RE
GS
rw
rwh
T2RH
EN
rw
CCM3
rw
CASC
rw
CCTT
OV
rwh
STNR
0
w
r
PAGE
rwh
0
EXEN TR2
2
r
rw
rwh
EDGE PREN
SEL
T2PRE
rw
rw
rw
RC2
rwh
C/T2
rw
CP/
RL2
rw
DCEN
rw
RC2
rwh
THL2
rwh
THL2
rwh
0
r
TF2EN EXF2E
N
rw
rw
CCM2
rw
CCM1
rw
CCM0
rw
CCTB
5
rw
CCTB CCTB
4
3
rw
rw
CCTREL
rw
CCTB
2
rw
CCTB
1
rw
CCTB
0
rw
CCTREL
rw
CCT
rwh
Data Sheet
45
V0.1, 2008-04