TLE4291E Datasheet, PDF (5/28 Pages) Infineon Technologies AG – Low Drop Out Linear Voltage Regulator

3
Pin Configuration
3.1
Pin Assignment
TLE4291
Pin Configuration
I
1
EN
2
n.c.
3
RO
4
n.c.
5
RADJ
6
GND
7
14
Q
13
n.c.
12
WO
11
n.c.
10
WI
9
n.c.
8
D
PG -SSOP -14-1 .vsd
Figure 2 Pin Configuration PG-SSOP-14 EP
3.2
Pin Definitions and Functions
11
Pin Symbol Function
1
I
Regulator Input and IC Supply
For compensating line influences, a capacitor to GND close to the IC pins is recommended.
2
EN
Enable
High signal enables the regulator;
Low signal disables the regulator;
Connect to I, if the enable function is not needed.
3
n.c.
Not Connected
Internally not connected; Connection to PCB GND recommended.
4
RO
Reset Output
Open collector output with an internal pull-up resistor to the output Q.
An additional external pull-up resistor to the output Q is optional.
Leave open if the reset function is not needed.
5
n.c.
Not Connected
Internally not connected; Connection to PCB GND recommended.
6
RADJ Reset Switching Threshold Adjust
For reset threshold adjustment connect to a voltage divider from output Q to GND.
For triggering the reset at the internally determined threshold, connect this pin directly to
GND.
Connect directly to GND if the reset function is not needed.
7
GND
Ground
Interconnect the GND pins on PCB.
Connect to heat sink area.
Data Sheet
5
Rev. 1.1, 2012-12-03