TLD5097EL_15 Datasheet, PDF (5/41 Pages) Infineon Technologies AG – Multitopology LITIX Power DC/DC Controller IC

Infineon® LITIX™ Power
TLD5097EL
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment
IVCC
SWO
SGND
SWCS
ST
FBH
FBL
1
14
2
13
3
12
4
exposed
Pad
11
5
10
6
9
7
8
IN
EN/PWMI
GND
FREQ/SYNC
SET
OVFB
COMP
Figure 3-1 Pin Configuration TLD5097EL
3.2
Pin Definitions and Functions
Table 3-1 Pin Definition and Function
# Symbol
Direction Type
1 IVCC
2 SWO
3 SGND
4 SWCS
5 ST
6 FBH
7 FBL
8 COMP
Function
Internal LDO Output;
Used for internal biasing and gate drive. Bypass with
external capacitor. Pin must not be left open.
Switch Output;
Connect to gate of external switching MOSFET
Current Sense Ground;
Ground return for current sense switch
Current Sense Input;
Detects the peak current through switch
Status Output;to indicate fualt conditions
Voltage Feedback Positive;
Non inverting Input (+)
Voltage Feedback Negative;
Inverting Input (-)
Compensation Input;
Connect R and C network to pin for stability
Data Sheet
5
Revision 1.0
2015-03-12