IKCM15H60GA_15 Datasheet, PDF (5/16 Pages) Infineon Technologies AG – Control Integrated POwer System

CIPOS™ IKCM15H60GA
Pin Assignment
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Pin Name
VS(U)
VB(U)
VS(V)
VB(V)
VS(W)
VB(W)
HIN(U)
HIN(V)
HIN(W)
LIN(U)
LIN(V)
LIN(W)
VDD
VFO
ITRIP
VSS
NW
NV
NU
W
V
U
P
NC
Pin Description
U-phase high side floating IC supply offset voltage
U-phase high side floating IC supply voltage
V-phase high side floating IC supply offset voltage
V-phase high side floating IC supply voltage
W-phase high side floating IC supply offset voltage
W-phase high side floating IC supply voltage
U-phase high side gate driver input
V-phase high side gate driver input
W-phase high side gate driver input
U-phase low side gate driver input
V-phase low side gate driver input
W-phase low side gate driver input
Low side control supply
Fault output / Temperature monitor
Over current shutdown input
Low side control negative supply
W-phase low side emitter
V-phase low side emitter
U-phase low side emitter
Motor W-phase output
Motor V-phase output
Motor U-phase output
Positive bus input voltage
No Connection
Pin Description
HIN(U,V,W) and LIN(U,V,W) (Low side and high
side control pins, Pin 7 - 12)
These pins are positive logic and they are
responsible for the control of the integrated IGBT.
The Schmitt-trigger input thresholds of them are
such to guarantee LSTTL and CMOS compatibility
down to 3.3V controller outputs. Pull-down resistor
of about 5k is internally provided to pre-bias inputs
during supply start-up and a zener clamp is
provided for pin protection purposes. Input Schmitt-
trigger and noise filter provide beneficial noise
rejection to short input pulses.
The noise filter suppresses control pulses which are
below the filter time tFILIN. The filter acts according to
Figure 4.
 5k
Figure 3: Input pin structure
Figure 4: Input filter timing diagram
Datasheet
5
Ver. 1.2, 2014-06-01