TLS205B0EJV50_15 Datasheet, PDF (4/25 Pages) Infineon Technologies AG – Linear Voltage Post Regulator

3
Pin Configuration
3.1
Pin Assignment
TLS205B0EJV50
TLS205B0LDV50
Pin Configuration
Q
SENSE
NC
BYP
1
8
2
7
3
6
9
4
5
TLS205B0EJV50
I
NC
GND
EN
Figure 2 Pin Configuration of TLS205B0EJV50 in PG-DSO-8 Exposed Pad
Q
Q
NC
SENSE
BYP
1
10
2
9
3
8
4 ₁₁ 7
5
6
I
I
NC
EN
GND
TLS205B0LDV50
Figure 3 Pin Configuration of TLS205B0LDV50 in PG-TSON-10
Data Sheet
4
Rev. 1.1, 2015-01-15