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TLE7272-2 Datasheet, PDF (4/21 Pages) Infineon Technologies AG – 5-V Low Dropout Voltage Regulator | |||
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3
Pin Configuration
3.1
Pin Assignment PG-SSOP-14 Exposed Pad
TLE7272-2
Pin Configuration
QF
52
QF
,
QF
QF
*1'
QF
QF
QF
(1
4
QF
QF
7/(B3,1&21),*B6623
69*
Figure 2 Pin Configuration (top view)
3.2
Pin Definitions and Functions PG-SSOP-14 Exposed Pad
Pin No.
1,3,5,7
2
4
6
8,10,11,12,14
9
13
Pad
Symbol Function
n.c.
non connected
can be open or connected to GND
RO
Reset Output
open collector output with integrated pull-up resistor;
optional external pull-up resistor of ⥠10 k⦠to pin Q;
leave open if reset function not needed
GND Ground
EN
Enable Input
high level input signal enables the IC;
low level input signal disables the IC;
integrated pull-down resistor
n.c.
non connected
can be open or connected to GND
Q
Output
block to ground with a capacitor close to the IC terminals, respecting the values given
for its capacitance and ESR in âFunctional Rangeâ on Page 6
I
Input
block to ground directly at the IC with a ceramic capacitor
â
Exposed Pad
connect to GND and heatsink area
Data Sheet
4
Rev. 1.0, 2009-06-01
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